AD5522JSVD AD [Analog Devices], AD5522JSVD Datasheet
AD5522JSVD
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AD5522JSVD Summary of contents
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Preliminary Technical Data FEATURES Quad Parametric Measurement Unit FV, FI, FN, MV, MI Functions 4 Programmable Current Ranges (Internal R 5uA, 20uA, 200uA and 2mA 1 Programmable Current Range up to 64mA (external R 22 Range with Asymmetrical ...
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AD5522 TABLE OF CONTENTS Features..................................................................................................................... 1 Revision History...................................................................................................... 2 Specifications ........................................................................................................... 4 Table 2. TIMING Characteristics .................................................................... 9 Absolute Maximum Ratings................................................................................ 12 Thermal Resistance.......................................................................................... 12 ESD Caution ..................................................................................................... 12 Pin Configuration and Function Descriptions................................................. 13 TERMINOLOGY.................................................................................................. 16 Functional Description ........................................................................................ ...
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Preliminary Technical Data AV SS (0- (0- AGND VREF 16 X1 REG X2 REG 16 M REG * REG *2 OFFSET DAC REFGND REG 16 M REG X2 REG ...
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AD5522 SPECIFICATIONS ≥ ≤ − Table 1. AV 10V, AV 5V, | registers at default values (T = +25 to +90 J Parameter FORCE VOLTAGE FOH Output Voltage Range AV EXTFOH Output Voltage Range AV Output Voltage ...
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Preliminary Technical Data MEASURE VOLTAGE Measure Voltage Range AV Offset Error Offset Error 2 Offset Error Tempco Gain Error Gain Error 2 Gain Error Tempco Linearity Error -0.01 COMPARATOR Comparator Span Offset Error 2 Propagation delay VOLTAGE CLAMPS Clamp Span ...
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AD5522 MEASURE OUTPUT (MEASOUT) Measure Output Voltage Span Measure Pin output Impedance Output leakage current 2 Output Capacitance 2 Max Load Capacitance 2 Output Current drive 2 Short Circuit Current 2 MEASOUT Slew Rate 2 MEASOUT enable time 2 MEASOUT ...
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Preliminary Technical Data DAC SPECIFICATIONS Resolution 2 Voltage Output Span 2 Differential Nonlinearity COMPARATOR DAC DYNAMIC SPECIFICATIONS 2 Output Voltage Settling Time 2 Slew Rate 2 Digital-to-Analog Glitch Energy 2 Glitch Impulse Peak Amplitude REFERENCE INPUT V DC Input Impedance ...
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AD5522 NOISE PERFORMANCE NSD of Measure Voltage In-Amp NSD of Measure Current In-Amp NSD of Force Amplifier POWER SUPPLIES Max Power Dissipation 2 ...
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Preliminary Technical Data TABLE 2. TIMING CHARACTERISTICS ≥ ≤ − ≥ AV 10V, AV 5V, |AV – +25 to +90 C, max specs unless otherwise noted.) J SPI INTERFACE ( and ...
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AD5522 TO OUTPUT PIN 50pF C L Figure 3.. Load Circuit for CGALM , TMPALM SCLK SYNC 5 DB28 SDI BUSY 1 LOAD 1 FOH 2 LOAD 2 FOH RESET BUSY 1 LOAD ACTIVE DURING BUSY ...
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Preliminary Technical Data SCLK SYNC SDI DB28 SDO Figure 6. SPI Read Timing (Readback word contains 24 bits and can be clocked out with a minimum of 24 clock edges) SYNC SYNC t3 SCLK SCLK MSB D28 SDI SDI SDO ...
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AD5522 ABSOLUTE MAXIMUM RATINGS Table 3. AD5522 Absolute Maximum Ratings Parameter Rating Supply Voltage 34V AGND -0.3V to 34V AGND 0.3V to -34V AGND -0.3 V, +7V ...
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Preliminary Technical Data PIN CONFIGURATION AND FUNCTION DESCRIPTIONS AVDD CFF0 CCOMP0 EXTMEASIH0 EXTMEASIL0 FOH0 GUARD0 GUARDIN0 /DUTGND0 MEASVH0 AGND AGND MEASVH2 GUARDIN2 /DUTGND2 GUARD2 FOH2 EXTMEASIL2 EXTMEASIH2 CCOMP2 CFF2 AVDD Table 6. Pin Function Descriptions Pin No. Pin No. Mnemonic ...
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AD5522 32 49 SDO 35 46 CPOL2/CPO0 36 45 CPOH2/CPO1 37 44 CPOL3/CPO2 38 43 CPOH3/CPO3 MEASOUT(0-3) 66, 65, 64, 15, 16, 17 SYS_FORCE 70 11 SYS_SENSE 71 10 REFGND 72 9 VREF 75 6 SPI/LVDS ...
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Preliminary Technical Data EXTFOH0 AVSS RESET TMPALM CGALM SPI/LVDS AVDD DUTGND VREF REFGND SYS_SENSE AGND SYS_FORCE AVSS MEASOUT0 MEASOUT1 MEASOUT2 MEASOUT3 AVSS EXTFOH1 AD5522 9 TOP VIEW 10 EXPOSED PAD ON TOP ...
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AD5522 TERMINOLOGY Offset Error Offset error is a measure of the difference between actual and ideal voltage expressed in mV. Gain Error Gain error is the difference between full-scale error and zero-scale error expressed in %. Gain Error ...
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Preliminary Technical Data TYPICAL PERFORMANCE CHARACTERISTICS Figure 10 FV Linearity Figure 11MV linearity Figure 12MI Linearity in 2mA range Leakage as function of Temp 12V 2 EXTFOH CFF 1.5 FOH EXTMEASIH 1 EXTMEASIL MEASVH GRD_DUTGND 0.5 COMBINED LEAKAGE ...
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AD5522 0.15 0.1 0.05 0 -0.05 -0.1 -0.15 -0.2 V Figure 16. Leakage as a function of voltage (25degC). Figure 17Noise Spectral density EXTFOH CFF FOH EXTMEASIH EXTMEASIL MEASVH GRD_DUTGND COMBINED LEAKAGE Rev. PrM | Page Preliminary ...
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Preliminary Technical Data FUNCTIONAL DESCRIPTION The AD5522 is a highly integrated quad per pin parametric measurement unit (PPMU) for use in semiconductor automatic test equipment. It contains programmable modes to force a pin voltage and measure the corresponding current (FVMI), ...
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AD5522 CURRENT RANGE SELECTION Integrated thin film resistors minimize external components and allow easy selection of current ranges from 5 µA (200kΩ), 20μA (50kΩ), 200μA (5kΩ) and 2mA (500Ω). Per channel, one current range up to 64mA may be accommodated ...
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Preliminary Technical Data GUARD AMPLIFER A Guard amplifier allows the user to bootstrap the shield of the cable to the voltage applied to the DUT, ensuring minimal drops across the cable. This is particularly important for measurements requiring a high ...
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AD5522 SYSTEM FORCE SENSE SWITCHES Each channel has switches to allow connection of the force (FOHx) and sense (MEASVHx) lines to a central PMU for calibration purposes. There is one set of SYS_FORCE and SYS_SENSE pins per device. For calibration ...
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Preliminary Technical Data DAC LEVELS Each channel contains five dedicated DAC levels : one for the force amplifier, one each for the clamp high and low levels and one each for the comparator high and low levels. The architecture of ...
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AD5522 Offset and Gain registers for the FIN DAC The FIN (force amplifier input) DAC level contains independent offset and gain control registers that allow the user to digitally trim offset and gain. There are six sets of x1, m ...
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Preliminary Technical Data Reference Selection Example Nominal Output Range = 10V (-2V to +8V) Offset Error = ±100mV Gain Error = ±0.5% REFGND = AGND = 0V 1) Gain Error = ±0.5% => Maximum Positive Gain Error = +0.5% => ...
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AD5522 CIRCUIT OPERATION FORCE VOLTAGE, FV Most PMU measurements are performed while in force voltage and measure current mode, for example, when the device is used as a device power supply continuity or leakage testing. In the force ...
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Preliminary Technical Data FORCE CURRENT the force current mode, the voltage at FIN is now converted to a current and applied to the DUT. The feedback path is now the current measure amplifier, feeding back the voltage measured ...
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AD5522 SERIAL INTERFACE The AD5522 contains two high-speed serial interfaces, an SPI compatible, interface operating at clock frequencies up to 50MHz, and an EIA-644-compliant, LVDS interface. To minimize both the power consumption of the device and on- chip digital noise, ...
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Preliminary Technical Data Table 12. BUSY Pulse Width Action Loading data to PMU, System Control Register or Readback Loading x1 to any 1 PMU DAC Channel Loading x1 to any 2 PMU DAC Channels Loading x1 to any 3 PMU ...
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AD5522 REGISTER SELECTION The serial word assignment consists of 29 bits. Bits 28 through to 22 are common to all registers, whether writing to or reading from the device. PMU3 to PMU0 data bits address each PMU channel (or associated ...
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Preliminary Technical Data WRITE SYSTEM CONTROL REGISTER The System Control Register is accessed when the PMU channel address PMU3-PMU0 and Mode Bits, MODE1 and MODE0 are all zeros. It allows quick setup of different functions within the device. The System ...
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AD5522 8 GUARD EN Guard enable. The Guard Amplifier is disabled on power on; write a “1” to enable it. Disabling the guard function if not in use saves power (typically 400μA per Channel). 7 GAIN1 MEASOUT Output Range. The ...
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Preliminary Technical Data WRITE PMU REGISTER To address PMU functions, set Mode bits MODE1, MODE0 low, this selects the PMU register as outlined in Table 13 and Table 14. The AD5522 has very flexible addressing, in that it allows writing ...
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AD5522 14 MEAS1 Bits MEAS1 and MEAS0 allow selection of the required measure mode, allowing the measout line to be disabled, connected to the temperature sensor or enabled for measurement or current or voltage. 13 MEAS0 MEAS1 MEAS0 0 0 ...
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Preliminary Technical Data WRITE DAC REGISTER The DAC input, gain and offset registers are addressed through a combination of PMU bits (Bits 27 through 24) and MODE bits (Bits 23 and 22). Bits A5 through A0 address each of the ...
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AD5522 DAC Addressing For the FIN and Comparator (CPH & CPL) DACs, there are sets of x1, m and c registers for each current range and for the voltage range, but only two sets for the Clamp function (CLL and ...
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Preliminary Technical Data READ REGISTERS Readback of all the registers in the device is possible via the both SPI and LVDS interfaces. In order to readback data from a register first necessary to write a “readback” command to ...
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AD5522 READBACK OF SYSTEM CONTROL REGISTER The readback function bit word, mode, address and System Control Register data bits as shown in the following table. Table 23. Readback System Control Register Data Bit Bit name Description 23 ...
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Preliminary Technical Data READBACK OF PMU REGISTER The PMU readback function bit word, mode, address and PMU data bits. Table 24. Readback PMU Register (Only one PMU register may be read back at any one time). Bit ...
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AD5522 READBACK OF ALARM STATUS REGISTER The Alarm Status register is a READ only register that gives information on temperature, clamp and guard alarm events. In the event the Guard and Clamp alarm functions are not used, (the alarm function ...
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Preliminary Technical Data POWER ON DEFAULT The power on default for all DAC channels is that the contents of each m register is set to full-scale (0xFFFF) and c register to midscale(0x8000). The contents of the DAC registers are : ...
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AD5522 SETTING UP THE DEVICE ON POWER ON On power on, default conditions are recalled from the power on reset register ensuring each PMU and DAC channel is powered known condition. To operate the device, the user ...
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Preliminary Technical Data REQUIRED EXTERNAL COMPONENTS The minimum required external components are shown in the block diagram below. Decoupling will be very dependent on the type of supplies used, other decoupling on the board and the noise in the system. ...
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AD5522 POWER SUPPLY DECOUPLING In any circuit where accuracy is important, careful consideration of the power supply and ground return layout helps to ensure the rated performance. The printed circuit board on which the AD5522 is mounted should be designed ...
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Preliminary Technical Data TYPICAL APPLICATION FOR THE AD5522 Figure 29 shows the AD5522 as used in an ATE system. This device can used as a per pin parametric unit in order to speed up the rate at which testing can ...
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AD5522 OUTLINE DIMENSIONS 0.75 0.60 0.45 0° MIN 1.05 0.20 1.00 0.09 0.95 7° 3.5° 0.15 0° SEATING 0.05 0.08 MAX PLANE COPLANARITY VIEW A ROTATED 90° CCW 0.75 0.60 0.45 0° MIN 1.05 0.20 1.00 0.09 0.95 7° 3.5° ...
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... Preliminary Technical Data ORDERING GUIDE Model Function AD5522JSVD Quad PMU with 4 internal current ranges, full comparator function, 1 external current range, SPI and LVDS serial interfaces. 2 AD5522JSVUZ Quad PMU with 4 internal current ranges, full comparator function, 1 external current range, SPI and LVDS serial interfaces ...
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AD5522 NOTES © 2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective companies. PR06197-0-03/07(PrM) Printed in the U.S.A. Preliminary Technical Data Rev. PrM | Page ...