AD5522JSVD AD [Analog Devices], AD5522JSVD Datasheet - Page 34

• Manufacturer Part Number: AD5522JSVD
• Description: Quad Parametric Measurement Unit With Integrated 16-Bit Level Setting DACs
• Manufacturer: AD [Analog Devices]

AD5522
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0 (LSB)
MEAS1
MEAS0
FIN
CL
CPOLH
COMPARE V/I
CLEAR
0
SFO
SSO
Bits MEAS1 and MEAS0 allow selection of the required measure mode, allowing the measout line to be disabled, connected
to the temperature sensor or enabled for measurement or current or voltage.
Bit FIN = 0 switches the input of the force amplifier to GND, while FIN = 1 connects it to FIN DAC output.
Bits SF0 through SS0 address each of the different combinations of switching the system force and sense lines to the force
and sense at the DUT. Selection of which channel the system force and sense lines are connected to as per P3 to P0
addressing. For correct operation, only one PMU channel should be connected at any one time to the SYS_FORCE/SYS_SENSE
paths.
Per PMU current clamp enable bit. A logic high enables the clamp function for the selected PMU. The current clamp enable
function is also available in the System control register. This dual functionality allows flexible enable or disabling of this
function. When reading back information on the status of the clamp enable function on a per channel basis, what was most
recently written to the current clamp register is available in the readback word from either PMU or System Control Registers.
The Voltage clamps (FI mode) are always enabled.
Comparator output enable bit. A logic high enables the comparator output for the selected PMU, the comparator function
CPBIASEN must be enabled in the SYSTEM CONTROL REGISTER. The comparator output enable function is also available in
the System control register. This dual functionality allows flexible enable or disabling of this function.
A logic high selects compare voltage function, while logic low, current function.
To clear or reset a latched alarm bit and pin (temperature, guard or clamp), load a “1” to the Clear bit position. This bit applies
to latched alarm (clamp and guard) conditions on all four PMU channels.
Unused bits. Set to 0.
MEAS1
0
0
1
1
SF0
0
0
1
1
SS0
0
1
0
1
MEAS0
0
1
0
1
Action
SYS_FORCE and SYS_SENSE Hi-Z
SYS_FORCE Hi-Z, SYS_SENSE connected to MEASVHx
SYS_FORCE connected to FOHx, SYS_SENSE Hi-Z
SYS_FORCE connected to FOHx, SYS_SENSE connected to MEASVHx
Action
MEASOUT connected to I SENSE
MEASOUT connected to V SENSE
MEASOUT connected to Temperature Sensor
MEASOUT Hi-Z (SW 12 Open)
Rev. PrM | Page 34 of 48
Preliminary Technical Data