AD5522JSVD AD [Analog Devices], AD5522JSVD Datasheet - Page 21

• Manufacturer Part Number: AD5522JSVD
• Description: Quad Parametric Measurement Unit With Integrated 16-Bit Level Setting DACs
• Manufacturer: AD [Analog Devices]

Preliminary Technical Data
GUARD AMPLIFER
A Guard amplifier allows the user to bootstrap the shield of the
cable to the voltage applied to the DUT, ensuring minimal
drops across the cable. This is particularly important for
measurements requiring a high degree of accuracy and in
leakage current testing.
If not required, all four Guard Amplifiers may be disabled via
the serial interface (through the System Control Register), this
decreases the power consumption by 400uA per channel.
As described in the DUTGND section, the GUARDIN(0-3)
/DUTGND(0-3) is a shared pin. It can function either as a
guard amplifier input per channel or as a DUTGND input per
channel as required by the end application. Refer to Figure 20.
A Guard alarm event occurs when the guard output moves
more than 100mV away from the Guard input voltage for more
than 200μs. In the event this happens, this will be flagged via
the CGALM open drain output. As the guard and clamp alarm
functions share the same alarm output CGALM , the alarm
information (alarm trigger and alarm channel) is available via
the serial interface (ALARM STATUS REGISTER).
Alternatively, the serial interfaces allow the user to setup the
CGALM output to flag either the clamp status or the guard
status. By default, this open drain alarm pin is an unlatched
output, but may be set to a latched output via the serial
interface, System Control Register.
Rev. PrM | Page 21 of 48
COMPENSATION CAPACITORS
Each channel requires an external compensation capacitor
(C
while ensuring settling time is optimized. In addition, one C
pin is provided to further optimize stability and settling time
performance when in Force voltage mode. When changing
from Force current to force voltage mode, the switch
connecting C
force amplifier is designed to drive load capacitances up to 10nF
(with Ccomp = 100pF), using larger compensation capacitor
values, it is possible to drive larger load at the expense of an
increase in settling time. If a wide range of load capacitance
must be driven, then an external multiplexer connected to the
C
stability. The series resistance of a switch placed on C
should typically be <50Ω.
Similarly, connecting the C
would cater for a wide range of CDUT in Force Voltage mode.
The series resistance of the multiplexer used should be such
that:
Table 9. Suggested Compensation Capacitor Selection
C
≤1nF
≤10nF
≤100nF
LOAD
COMP
COMP
pin will allow optimization of settling time versus
) to ensure stability into the maximum load capacitance
⎛
⎜
⎝
2
Π
FF
RON
capacitor is automatically closed. While the
1
×
CDUT
C
100pF
100pF
C
COMP
LOAD
FF
/100
⎞
⎟
⎠
node to a multiplexer externally,
>
100
kHz
C
220pF
1nF
C
FF
LOAD
/10
AD5522
COMP
,
FF