AD5522JSVD AD [Analog Devices], AD5522JSVD Datasheet - Page 35

• Manufacturer Part Number: AD5522JSVD
• Description: Quad Parametric Measurement Unit With Integrated 16-Bit Level Setting DACs
• Manufacturer: AD [Analog Devices]

Preliminary Technical Data
WRITE DAC REGISTER
The DAC input, gain and offset registers are addressed through a combination of PMU bits (Bits 27 through 24) and MODE bits (Bits 23
and 22). Bits A5 through A0 address each of the DAC levels on chip. D15 through D0 are the DAC data Bits when writing to these
registers. PMU address bits allow addressing to DAC across any combination of PMU channels.
Table 19. DAC Register Bits
B28
RD/ WR
Table 20. DAC Register Functions
Bit
28 (MSB)
27
26
25
24
23
22
DAC REGISTER SPECIFIC BITS
21,20,19
18,17,16
15 to 0(LSB)
B27
PMU3
Bit name
RD/ WR
PMU3
PMU2
PMU1
PMU0
MODE1
MODE0
A5,A4,A3
A2,A1,A0
D15 (MSB) to D0(LSB)
B26
PMU2
B25
PMU1
B24
PMU0
Description
When low, a write function takes place to the selected register, while if the RD/ WR bit is set high, this initiates a
readback sequence of PMU, Alarm, Comparator, System Control or DAC register as determined by address bits.
Bits PMU3 through PMU0 address each of the PMU and DAC channels in the device. This allows individual
control of each DAC channel or any manner of combined addressing in addition to multi-channel programming.
Mode Bits, MODE0 and MODE1 allow addressing of the DAC gain (m), offset (c ) or input register (x1)
DAC Address Bits. A5 to A3 select which register set is addressed. See Table 21
DAC Address Bits, A2 to A0 select which DAC is addressed. See Table 21
16 DAC Data bits. D15 MSB.
B27
PMU3
0
0
0
0
0
-
1
-
1
1
MODE1
0
0
1
1
B23
MODE1
B26
PMU2
0
0
0
0
1
-
0
-
1
1
MODE0
0
1
0
1
B22
MODE0
B25
PMU1
0
0
1
1
0
-
0
-
1
1
Rev. PrM | Page 35 of 48
Action
System Control Register or PMU Register
DAC Gain (m) Register
DAC Offset (c) Register
DAC Input Data Register, (x1)
B21
A5
B24
PMU0
0
1
0
1
0
-
0
-
0
1
B20
A4
B23
MODE1
0
Select DAC or PMU Registers.
See below
B19
A3
B18
A2
B17
A1
B22
MODE0
0
B16
A0
B15 to B0
DATA BITS D15 (MSB to D0 (LSB)
SELECTED REGISTER
CH3
Write to System Control Register
×
×
×
×
-
CH3
-
CH3
CH3
CH2
×
×
×
CH2
-
×
-
CH2
CH2
CH1
×
CH1
CH1
×
-
×
-
CH1
CH1
CH0
CHO
×
CH0
×
-
×
-
×
CH0
AD5522