lc51024vg Lattice Semiconductor Corp., lc51024vg Datasheet - Page 15

no-image

lc51024vg

Manufacturer Part Number
lc51024vg
Description
3.3v In-system Programmable Superbig, Superwide High Density Plds Tm Tm
Manufacturer
Lattice Semiconductor Corp.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
lc51024vg-10F484C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
lc51024vg-10F484I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
lc51024vg-10F676C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
lc51024vg-10F676I
Manufacturer:
LATTICE
Quantity:
101
Part Number:
lc51024vg-10F676I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
lc51024vg-12F484I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
lc51024vg-5F484C-75I
Manufacturer:
TI
Quantity:
600
Part Number:
lc51024vg-5F676C-75I
Manufacturer:
SOURIAU
Quantity:
1 001
Part Number:
lc51024vg-75F484C
Manufacturer:
JRC
Quantity:
2 763
Part Number:
lc51024vg-75F484C-10I
Manufacturer:
LATTICE
Quantity:
20 000
Company:
Part Number:
lc51024vg-75F484C-10I
Quantity:
48
Part Number:
lc51024vg-75F676C-10I
Manufacturer:
UBLOXU-LOX
Quantity:
56
Lattice Semiconductor
ispMACH 5256B External Switching Characteristics
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
f
f
f
1. Timing Numbers are based on default LVCMOS 2.5V, 8mA I/O buffers. Use timing adjusters provided to calculate timing for other stan-
2. Measured using standard switching circuit, assuming global routing loading of 1, worst case PTSA loading, CLK0, 1 output switching and
3. Pulse widths and clock widths less than minimum will cause unknown behavior.
4. Standard 16-bit counter using GRP feedback.
Parameter
PD
PD_PTSA
S
S_PTSA
SIR
H
H_PTSA
HIR
CO
R
RW
PTEN/DIS
GPTEN/DIS
GOE/DIS
CW
GW
WIR
MAX
MAX
MAX
dards.
high speed AND array.
4
(Ext.) Clock frequency with external feedback,
(Tog.) Clock frequency max toggle
Data propagation delay, 5-PT bypass
Propagation delay
GLB register setup time before clock, 5-PT
bypass
GLB register setup time before clock
GLB register setup time before clock, input reg-
ister path, 5-PT bypass
GLB register hold time before clock, 5-PT
bypass
GLB register hold time before clock
GLB register hold time before clock, input
reg.path
GLB register clock-to-output delay
External reset pin to output delay
Reset pulse duration
Input to output local product term output
enable/disable
Input to output global product term output
enable/disable
Global OE input to output enable/disable
Clock pulse duration
Global gate width low (for low transparent) or
high (for high transparent)
Input register clock width, high or low
Clock frequency with internal feedback
1/(t
S_PTSA
+ t
CO
Description
)
Over Recommended Operating Conditions
1, 2, 3
15
Min.
250
185
333
2.1
2.7
1.9
0.0
0.0
0.0
3.0
1.5
1.5
1.5
-
-
-
-
-
-
-
-4
Max.
4.0
4.8
2.7
3.8
5.0
5.5
3.4
-
-
-
-
-
-
-
-
-
-
-
-
-
ispMACH 5000B Family Data Sheet
Min.
180
142
225
3.0
4.0
2.5
0.0
0.0
0.0
3.5
2.2
2.2
2.2
-
-
-
-
-
-
-
-5
Max.
5.0
6.5
3.0
5.0
6.0
7.0
3.7
-
-
-
-
-
-
-
-
-
-
-
-
Min.
150
200
5.0
6.5
3.5
0.0
0.0
0.0
5.0
2.5
2.5
2.5
95
-
-
-
-
-
-
-
-75
Max.
10.0
7.5
9.0
4.0
7.5
8.5
5.5
-
-
-
-
-
-
-
-
-
-
-
-
-
Min.
110
175
6.5
8.5
5.0
0.0
0.0
0.0
6.5
2.8
2.8
2.8
71
-
-
-
-
-
-
-
-10
Max.
10.0
12.0
10.0
10.0
12.0
5.5
7.5
Timing v.1.3
-
-
-
-
-
-
-
-
-
-
-
-
-
Units
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

Related parts for lc51024vg