PSMN5R0-30YL_10 NXP [NXP Semiconductors], PSMN5R0-30YL_10 Datasheet - Page 3

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PSMN5R0-30YL_10

Manufacturer Part Number
PSMN5R0-30YL_10
Description
N-channel TrenchMOS logic level FET
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
PSMN5R0-30YL_3
Product data sheet
Fig 1.
Fig 3.
(A)
I
D
10
100
10
10
(A)
I
80
60
40
20
10
D
-1
0
3
2
1
10
mounting base temperature
Continuous drain current as a function of
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
0
-1
50
100
Limit R
150
DSon
T
All information provided in this document is subject to legal disclaimers.
003aac553
mb
= V
1
(°C)
DS
/ I
200
Rev. 03 — 4 January 2010
D
Fig 2.
P
(%)
der
120
80
40
0
function of mounting base temperature
Normalized total power dissipation as a
0
10
N-channel TrenchMOS logic level FET
50
DC
PSMN5R0-30YL
100
V
100 ms
DS
10 ms
100 μs
1 ms
10 μs
150
(V)
© NXP B.V. 2010. All rights reserved.
T
003aac588
mb
03aa16
(°C)
10
200
2
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