VN16218L2 VAISH [Vaishali Semiconductor], VN16218L2 Datasheet - Page 4

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VN16218L2

Manufacturer Part Number
VN16218L2
Description
2.5 Gigabit SERDES Transceiver
Manufacturer
VAISH [Vaishali Semiconductor]
Datasheet
VN16218
Legend: I = Input
Functional Block Description
PLL Clock Multiplier
The VN16218 employs a user-supplied 125 MHz clock both as a reference clock and as a Transmit Byte
Clock (TBC). The PLL Clock Multiplier multiplies the TBC by 20 to generate a baud rate clock of 2.5 GHz.
The TBC also clocks in the incoming parallel data.
Serializer (Parallel-to-Serial Converter)
Input data arrives at the T[0:19] bus as two parallel 10 bit characters and is latched into the input latch on
the rising edge of TBC. The data is serialized and transmitted on the TX differential outputs at a baud rate
of twenty times the frequency of TBC. Bit T0 is transmitted first. Incoming data is already encoded for
transmission using either the 8B/10B block code, as specified in the Fibre Channel specification, or an
equivalent edge-rich, DC-balanced code. If EWR is HIGH, the transmitter will be disabled, with TX+ HIGH
and TX- LOW. If EWR is LOW, the transmitter outputs serialized data. According to the fibre channel
specification, a transmission character is an encoded byte of 10 bits. The 20 bit interface of the VN16218
corresponds to two transmission characters, as shown in Table 2 below.
Table 2. Transmission Sequence and Mapping to Fibre Channel Character
2001-11-09
Last Data Bit Transmitted
RX[0:19]
RX+, RX-
TX+, TX-
VDDP
VSSP
TEST2
Parallel Data Bits
8B/10Bit Position
Valid Comma Pos.
Vaishali Semiconductor
Name
O = Output
P = Power supply connection
65, 63, 59
57, 55, 52
50, 48, 45
43, 64 ,62
58, 56, 54
51,49,47
44, 42
68, 67
74, 75
76,78
77
80
19
j
Pin #
18
h
747 Camden Avenue, Suite C
17
g
O-TTL
I-diff
O diff
P
P
I-TTL
Type
16
f
15
i
Receive Data Bus, Bits 0 through 19. 20 bit received data
character. Parallel data on this bus can be sampled on the rising
edge of RBC. R0 is the first bit received on RX+/RX-
Receiver serial inputs. The device recognizes receiver inputs when
EWR is LOW
Transmitter serial ouputs. When EWR is LOW, the serialized
transmit data is available on these pins. When EWR is HIGH, TX+
is HIGH and TX- is LOW
High-speed output driver power supply. Connect to 1.8V
High speed output driver ground. 0V
Test pin for Vaishali internal use only. User should tie this pin to
GND for normal operation
14
e
www.vaishali.com
13
d
Campbell
Page 4
12
c
11
b
CA 95008
Description
10
a
09
j
Ph. 408.377.6060
08
h
07
g
06
f
1
Advance Information
Fax 408.377.6063
05
i
1
04
e
1
MDSN-0003-00
First Data Bit Transmitted
03
d
1
02
c
1
01
b
0
00
a
0

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