PLL602-35 PhaseLink (PLL), PLL602-35 Datasheet - Page 3

• Manufacturer Part Number: PLL602-35
• Description: , 12 - 24MHz In, 750kHz - 800MHz Out, Pecl, 3.3V
• Manufacturer: PhaseLink (PLL)

PIN DESCRIPTIONS PLL602-37/-39 (see previous page of PLL602-35/-38)
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con-
ditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for INDUSTRIAL grade only.
47745 Fremont Blvd., Fremont, California 94538 TEL [phone] FAX [phone]
Supply Voltage
Input Voltage, dc
Output Voltage, dc
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
Input Static Discharge Voltage Protection
Name
XOUT
CLKT
CLKC
SEL0
SEL1
SEL2
SEL3
GND
VDD
XIN
OE
Pin number
7,8,9,10,14
TSSOP
1, 12
11
13
16
15
PARAMETERS
2
3
6
5
4
3x3mm QFN
Pin number
750kHz – 800MHz Low Phase Noise Multiplier XO
1,2,3,4,8
6,11
12
13
16
10
15
14
5
7
9
Preliminary
Type
O
O
P
P
I
I
I
I
I
I
I
Crystal in connector.
Crystal out connector.
Output enable pin (see OE logic state table on page 1).
GND.
True output LVDS (PLL602-39)
(N/C for PLL602-37)
Complementary output LVDS (PLL602-39)
(CMOS out for PLL602-37).
Multiplier selector pins. These pins have an internal pull-up
that will default SEL to ‘1’ when not connected to GND.
+3.3V VDD.
PLL602-35/-37/-38/-39
SYMBOL
V
V
T
T
T
V
DD
O
S
A
J
I
V
V
MIN.
SS
SS
Description
-65
-40
-
-
0.5
0.5
Universal Low Phase Noise IC’s
V
V
MAX.
DD
DD
150
125
260
85
7
2
+
+
0.5
0.5
Rev 10/29/02 Page 3
UNITS
kV
V
V
V
C
C
C
C