A2505PM-F AMICC [AMIC Technology], A2505PM-F Datasheet - Page 26

• Manufacturer Part Number: A2505PM-F
• Description: 16 Mbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface
• Manufacturer: AMICC [AMIC Technology]

POWER-UP AND POWER-DOWN
At Power-up and Power-down, the device must not be
selected (that is Chip Select (
applied on V
­
­
Usually a simple pull-up resistor on Chip Select (
used to insure safe and proper Power-up and Power-down.
To avoid data corruption and inadvertent write operations
during power up, a Power On Reset (POR) circuit is included.
The logic inside the device is held reset while V
than the POR threshold value, V
disabled, and the device does not respond to any instruction.
Moreover, the device ignores all Write Enable (WREN), Page
Program (PP), Sector Erase (SE), Bulk Erase (BE) and Write
Status Register (WRSR) instructions until a time delay of
t
VWI threshold. However, the correct operation of the device
is not guaranteed if, by this time, V
No Write Status Register, Program or Erase instructions
should be sent until the later of:
­
- t
Figure 19. Power-up Timing
PRELIMINARY
PUW
t
V
V
VSL
PUW
has elapsed after the moment that V
CC
SS
afterV
(min) at Power-up, and then for a further delay of t
at Power-down
after V
CC
CC
) until V
CC
passed the V
passed the VWI threshold
(April, 2007, Version 0.6)
CC
V
reaches the correct value:
V
CC
CC
(min)
(max)
CC
(min) level
S
V
) must follow the voltage
CC
CC
WI
is still below V
– all operations are
CC
rises above the
S
CC
) can be
CC
is less
(min).
VSL
t
PU
25
These values are specified in Table 6.
If the delay, t
V
even if the t
At Power-up, the device is in the following state:
­
­
Normal precautions must be taken for supply rail decoupling,
to stabilize the V
have the V
the package pins. (Generally, this capacitor is of the order of
0.1µF).
At Power-down, when V
to below the POR threshold value, V
disabled and the device does not respond to any instruction.
(The designer needs to be aware that if a Power-down
occurs while a Write, Program or Erase cycle is in progress,
some data corruption can result.)
CC
The device is in the Standby mode (not the Deep
Power-down mode).
The Write Enable Latch (WEL) bit is reset.
(min), the device can be selected for READ instructions
Full Device Access
CC
PUW
rail decoupled by a suitable capacitor close to
VS L
delay is not yet fully elapsed.
, has elapsed, after V
CC
feed. Each device in a system should
CC
AMIC Technology Corp.
drops from the operating voltage,
time
A25L16P Series
WI
CC
, all operations are
has risen above