PLL202-03 PhaseLink (PLL), PLL202-03 Datasheet - Page 6

• Manufacturer Part Number: PLL202-03
• Description: Ali, Via, Sis, Intel 440BX Chipset FTGS , Freq. Progr., SST
• Manufacturer: PhaseLink (PLL)

2. BYTE 1: CPU Clock Register (1=Enable, 0=Disable)
3. BYTE 2: PCI Clock Register (1=Enable, 0=Disable)
4. BYTE 3: SDRAM Clock Register (1=Enable, 0=Disable)
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Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit
Bit
Bit
Motherboard Clock Generator for SIS540/630 with 133MHz FSB
Pin#
Pin#
Pin#
43
45
46
14
13
12
11
32
31
29
28
21
20
18
17
9
8
7
-
-
-
-
-
-
Default
Default
Default
X
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Description
Select 24_48MHZ output. 0=48Mhz, 1=24Mhz
Reserved
Reserved
Reserved
CPU2 ( Active/Inactive )
CPU1 ( Active/Inactive )
CPU0 ( Active/Inactive )
Reserved
Description
Inverted power up latched CPU2.5_3.3 value (Read-back only)
PCI6 ( Active/Inactive )
PCI5 ( Active/Inactive )
PCI4 ( Active/Inactive )
PCI3 ( Active/Inactive )
PCI2 ( Active/Inactive )
PCI1 ( Active/Inactive )
PCI0 ( Active/Inactive )
Description
SDRAM7 ( Active/Inactive )
SDRAM6 ( Active/Inactive )
SDRAM5 ( Active/Inactive )
SDRAM4 ( Active/Inactive )
SDRAM3 ( Active/Inactive )
SDRAM2 ( Active/Inactive )
SDRAM1 ( Active/Inactive )
SDRAM0 ( Active/Inactive )
PLL202-03
Rev 02/15/00 Page 6