PLL202-02 PhaseLink (PLL), PLL202-02 Datasheet - Page 2

• Manufacturer Part Number: PLL202-02
• Description: Ali, Via, Sis, Intel 440BX Chipset FTGS , 14.318MHz In, 24MHz, 48MHz & 14.318MHz Out, CMOS
• Manufacturer: PhaseLink (PLL)

PIN DESCRIPTIONS
FREQUENCY (MHz) SELECTION TABLE
47745 Fremont Blvd., Fremont, California 94538 TEL [phone] FAX [phone]
FS2
24MHz/F1*
48MHz/F0*
0
0
0
0
1
1
1
1
REF/F2*
24MHz
48MHz
Name
XOUT
GND
VDD
CPU
XIN
FS1
0
0
1
1
0
0
1
1
4,9,10,14
Number
1,5,6,12
7,8,13
FS0
11
2
3
7
8
0
1
0
1
0
1
0
1
Type
O
O
P
B
B
B
P
I
100.2
CPU
Ground.
14.318MHz crystal input to be connected to one end of the crystal.
14.318MHz crystal output.
At power up, these pins are input pins and will determine the CPU clock
frequency. After input sampling, these pins will generate output clocks.
FS0, FS1 and FS2 have internal pull up (high by default).
24MHz output for SUPER I/O after input data latched during power-on.
48MHz output for USB after input data latched during power-on.
3.3V Power supply.
CPU clocks with frequencies defined by Frequency Table.
83.3
66.8
103
112
System Clock Generator for various SOC
80
75
68
Description
Preliminary
PLL202-02
Rev 12/04/02 Page 2