UPD70208HGF-12-3B9 NEC [NEC], UPD70208HGF-12-3B9 Datasheet - Page 61

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UPD70208HGF-12-3B9

Manufacturer Part Number
UPD70208HGF-12-3B9
Description
V40HLTM, V50HLTM 16/8, 16-BIT MICROPROCESSOR
Manufacturer
NEC [NEC]
Datasheet
Notes 1. If imm8 = 0
Instruc-
tion
Group
2. If imm8 = 0
PUSH
PREPARE
DISPOSE
Mnemonic
POP
If imm8
If imm8
mem16
reg16
sreg
PSW
R
imm8
imm16
mem16
reg16
sreg
PSW
R
imm16, imm8
1
1
Operand(s)
16
21 + 16 (imm8 – 1)
12/16
{17 + 8 (imm8 – 1)} / {21 + 16 (imm8 – 1)}
7 6 5 4 3 2 1 0
1 1 1 1 1 1 1 1
0 1 0 1 0 reg
0 0 0 sreg 1 1 0
1 0 0 1 1 1 0 0
0 1 1 0 0 0 0 0
0 1 1 0 1 0 1 0
0 1 1 0 1 0 0 0
1 0 0 0 1 1 1 1
0 1 0 1 1 reg
0 0 0 sreg 1 1 1
1 0 0 1 1 1 0 1
0 1 1 0 0 0 0 1
1 1 0 0 1 0 0 0
1 1 0 0 1 0 0 1
Operation Code
mod 1 1 0 mem
mod 0 0 0 mem
7 6 5 4 3 2 1 0
Bytes
2-4
2-4
1
1
1
1
2
3
1
1
1
1
4
1
Note 1
V40HL V50HL
Clock Cycles
23
10
10
10
65
10
24
12
12
12
75
10
9
Note 2
15/23
33/65
16/24
43/75
6/10
6/10
6/10
6/10
8/12
8/12
8/12
6/10
5/9
SP
(SP + 1, SP)
SP
(SP + 1, SP)
SP
(SP + 1, SP)
SP
(SP + 1, SP)
Push registers on the stack
SP
(SP + 1, SP)
SP
(SP + 1, SP)
(mem16)
SP
reg16
SP
sreg
SP
PSW
SP
Pop registers from the stack
Prepare New Stack Frame
Dispose of Stack Frame
SP – 2
SP – 2
SP – 2
SP – 2
SP – 2
SP – 2
SP + 2
SP + 2
SP + 2
SP + 2
(SP + 1, SP)
(SP + 1, SP)
(SP + 1, SP)
(SP + 1, SP)
(mem16)
reg16
sreg
PSW
imm8, sign of extension
imm16
Operation
sreg : SS, DS0, DS1
AC CY V
R R R R
Flags
P
S
R R
Z

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