ch7019 Chrontel, ch7019 Datasheet - Page 14

• Manufacturer Part Number: ch7019
• Description: Ch7019 Tv Encoder / Lvds Transmitter
• Manufacturer: Chrontel

CHRONTEL
When IDFx = 6 or 7 (YCrCb modes), the data inputs can be used to transmit sync information to the device. In these
modes the embedded sync follows a subset of the VIP2 convention, and the first byte of the video timing reference code
is assumed to occur when a Cb sample occurs, if the video stream is continuous. This is shown in Table 8 below.
Under mode 8 and 9, the CH7019 takes 24-bit data from both D1 and D2 and outputs to the dual LVDS links. A
maximum throughput of 330M pixels per second can be achieved. The timing signals of both input ports shall be
identical. H1, V1 and XCLK1 equal H2, V2 and XCLK2, respectively. Up-scaling and dithering functions are not
available in these modes.
14
Table 8: Non-Multiplexed YCrCb modes with Embedded Sync
IDFx =
Format =
Pixel #
Bus Data
In this mode, the S[7..0] byte contains the following data:
S[6] = F = 1 during field 2, 0 during field 1
S[5] = V = 1 during field blanking, 0 elsewhere
S[4] = H = 1 during EAV (synchronization reference at the end of active video)
S[7] and S[3:0] are ignored
D1[11]
D1[10]
D1[9]
D1[8]
D1[7]
D1[6]
D1[5]
D1[4]
D1[3]
D1[2]
D1[1]
D1[0]
D2[11]
D2[10]
D2[9]
D2[8]
D2[7]
D2[6]
D2[5]
D2[4]
D2[3]
D2[2]
D2[1]
D2[0]
0 during SAV (synchronization reference at the start of active video)
P0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
P1
S[7]
S[6]
S[5]
S[4]
S[3]
S[2]
S[1]
S[0]
0
0
0
0
0
0
0
0
16-bit YCrCb
for TV
6
P2
Y0[7]
Y0[6]
Y0[5]
Y0[4]
Y0[3]
Y0[2]
Y0[1]
Y0[0]
Cr0[7]
Cr0[6]
Cr0 [5]
Cr0 [4]
Cr0 [3]
Cr0 [2]
Cr0 [1]
Cr0 [0]
P3
Y1[7]
Y1[6]
Y1[5]
Y1[4]
Y1[3]
Y1[2]
Y1[1]
Y1[0]
Cb0[7]
Cb0[6]
Cb0 [5]
Cb0 [4]
Cb0 [3]
Cb0 [2]
Cb0 [1]
Cb0 [0]
P0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
201-0000-048
P1
S[7]
S[6]
S[5]
S[4]
S[3]
S[2]
S[1]
S[0]
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
24-bit YCrCb
for TV
7
P2
Y0[7]
Y0[6]
Y0[5]
Y0[4]
Y0[3]
Y0[2]
Y0[1]
Y0[0]
Cr0[7]
Cr0[6]
Cr0 [5]
Cr0 [4]
Cr0 [3]
Cr0 [2]
Cr0 [1]
Cr0 [0]
Cb0[7]
Cb0[6]
Cb0 [5]
Cb0 [4]
Cb0 [3]
Cb0 [2]
Cb0 [1]
Cb0 [0]
Rev. 2.4, 12/18/2006
CH7019B
P3
Y1[7]
Y1[6]
Y1[5]
Y1[4]
Y1[3]
Y1[2]
Y1[1]
Y1[0]
Cr1[7]
Cr1[6]
Cr1[5]
Cr1[4]
Cr1[3]
Cr1[2]
Cr1[1]
Cr1[0]
Cb1[7]
Cb1[6]
Cb1 [5]
Cb1 [4]
Cb1 [3]
Cb1 [2]
Cb1 [1]
Cb1 [0]