SI3452 SILABS [Silicon Laboratories], SI3452 Datasheet - Page 26
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SI3452
Manufacturer Part Number
SI3452
Description
QUAD HIGH-VOLTAGE PORT CONTROLLER FOR POE AND POE+ PSES
Manufacturer
SILABS [Silicon Laboratories]
Datasheet
1.SI3452.pdf
(36 pages)
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Si3452/3
8. Firmware Release Notes
Devices marked with firmware revision 01 (see "13. Device Marking Diagram" on page 34) have the firmware
revision registers set as 0x61 = 0x00; 0x62 = 0x02, and 0x63 = 0x4F (0.2.79).
The following are known issues, all of which may be addressed with a future firmware revision:
8.1. Initialization Time
Issue: The initialization time after a reset or power up is 65 ms.
Impact: None - informational.
2
Workaround: Wait 100 ms after a reset before beginning I
C transactions.
8.2. Current Limiting in 2x Power Mode
Issue: In 2x current limiting mode, current is limited at the 1x value during the Tstart time as required by the 802.3at
draft standard. For the last 0.4 ms of the 60 ms Tstart time, the current limit is increased to the 2x value.
Impact: This would only be seen if the PD applies a continuous overload during the inrush time. The slight extra
spike of current is less than 1 ms; so, it falls within the allowed current limit transient response.
Workaround: None
2
8.3. I
C Address ACK
2
Issue: Very rarely, the Si3452 may not ACK the I
C address byte.
2
Impact: This is allowed in the I
C specification.
Workaround: Retransmit the address byte if there is an ACK failure.
8.4. Reading or Writing Unused Registers
It is recommended that unused registers not be read or written. In particular, reads from unused registers can be
interpreted as clear on read and may clear unexpected memory locations.
26
Rev. 1.0