SI3452 SILABS [Silicon Laboratories], SI3452 Datasheet
SI3452
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SI3452 Summary of contents
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... UAD TAG Features Each Si3452/3 high-voltage port controller supports four PSE power interfaces Programmable current limits for PoE (15.4 W), PoE+ (30 W), and proprietary systems ( per port 2 interface requires no external ...
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... Intelligent protection circuitry includes power supply under-voltage lockout (UVLO), port output current limiting and short-circuit protection, thermal overload sensing and port shutdown, and transient voltage surge-suppressors capable of protecting the Si3452/3 from a variety of harsh surge events seen on the RJ-45 interface. To maximize system design flexibility and minimize cost, each Si3452/3 connects directly to a system host ...
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... Current Limiting in 2x Power Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Address ACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 8.4. Reading or Writing Unused Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 9. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 10. Package Outline: 40-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 11. Recommended PCB Footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 12. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 12.1. Evaluation Kits and Reference Designs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 13. Device Marking Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 Rev. 1.0 Si3452/3 Page 3 ...
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... Si3452/3 1. Electrical Specifications Unless noted otherwise, specifications apply over the operating temperature range with VDD = +3.3 V and VEE = –48 V relative to GND. VDD pins should be electrically shorted. AGND pins, DGND, GND12, and GND34 should be electrically shorted ("GND"). VEE, VEE1, VEE2, VEE3, and VEE4 should be electrically shorted ("VEE"). ...
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... RST low time to generate system reset Measured V relative to actual for V (–44 to – Point at which VEE UVLO is declared. VEE going negative VEE going positive Rev. 1.0 Si3452/3 Min Typ Max Unit –10 — 85 °C –40 — 85 — 32 — ...
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... Si3452/3 Table 4. Detection Specifications Description Detection current limit Detection voltage, when kΩ DET Detection slew rate Detection probe duration Detection probe cycle time Minimum valid signature resistance Maximum valid signature resistance Resistance at which open circuit is declared Resistance at which short circuit is declared ...
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... CUT is user-programmable in 3.2 mA increments to over CUT will dynamically decrease to prevent excessive FET OVLD Test Conditions dc disconnect dV/dt disconnect Time from I load current to port OFF turn off Rev. 1.0 Si3452/3 Min Typ Max Unit Ω — 0.3 0.6 400 425 450 mA 1 –2 — ...
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... Si3452/3 Table 8. Port Measurement and Monitoring Specifications Description Symbol Port current measurement I OFFSET offset Port current measurement % tolerance 2 Table 9. SMBus (I C) Electrical Specifications VDD = 3.0 to 3.6 V Description Symbol V Input low voltage IL Input high voltage V IH Output low voltage V OL Input leakage current ...
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... INT pin high Notes: 1. Not production tested (guaranteed by design). 2. All timing references measured The Si3452/3 will stretch (pull down on) SCK during the ACK time period if required. The maximum SCL stretching is 10 µsec; so, SCL only needs to be bidirectional for SCL ...
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... Si3452/3 Table 12. Interrupt (INT) Specifications Description Symbol Output low voltage V OL Table 13. Input Voltage Reference Specifications Description Symbol Nominal VREF input Reference tolerance VREF loading 10 Test Conditions Min INT pin driving ≤ 8.5 mA — Test Conditions Min — — Input current –10 Rev ...
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... VDD AGND DGND GND12/34 SCL DET4 SDA INT DET3 Si3452/3 RST DET2 VREF DET1 RBIAS VEE VEE[4:1] VOUT4 VOUT3 VOUT2 VOUT1 –54 V Rev. 1.0 Si3452/3 PSE State Machines and Measurement Subsystem Mixed Signal Resources Si3452/3 PORT1 PORT2 PORT3 PORT4 2 C Host Interface 11 ...
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... Functional Description Integrating four independent, high-voltage PSE port interfaces, the Si3452/3 high-voltage port controller enables an extremely flexible solution for virtually any PoE or PoE+ PSE application. The Si3452/3 provides all of the high- voltage Power over Ethernet PSE functions. Each port of the Si3452/3 integrates all high-voltage PSE controller functions needed for a quad-port PoE design, including the power MOSFET, efficient current-sensing circuitry, transient voltage surge suppressor, and multiple detect and disconnect circuits ...
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... IEEE 802.3af and 802.3at standards. The current limit during this test mode nominal. The Si3452/3 supports 1-Event and 2-Event classification. When operating in PoE (<15.4 W) mode, 1-Event classification is used. Operation in PoE+ (>15.4 W) mode results in 2-Event classification probes. The 1-Event classification is compliant to IEEE standard 802 ...
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... Transient Voltage Surge Suppression The Si3452/3 features robust on-chip surge protectors on each port; this is an industry first. This unique protection circuitry acts as an active device that can withstand lightning-induced transients as well as large ESD transient events. When the port voltage exceeds its protection limit and the current reaches a triggering threshold, current is shunted from the port to the ground pins ...
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... Fixed IC Pin Set IC Addr ess Addr ess Figure 6. Typical I The Si3452 does not support the alert response address (ARA) protocol. Polling is used to determine which controller is interrupting in an interrupt-driven system compliant with the System Management Bus 2 C serial bus. Reads and writes to the interface by the 2 C interface autonomously controlling the serial transfer of the data ...
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... Pins with the same name must be externally connected and then tied high or low via a weak (10 k) pull up or pull down to establish the device address at power up. The Si3452/3 powers up in either Auto mode or Shutdown mode depending on the ordering part number. For more information, see "12. Ordering Guide" on page 33. ...
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... OR (tI Event AND tI CUT CUT or port voltage not within turns off ports but does not generate a disconnect event. EE Rev. 1.0 Si3452/3 mask) OR (Rgood_CLS_event AND or temperature status in register EE . The port is turned off on this event ...
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... L2 power management where the PSE advertises it is capable of PoE powering by generating two classification pulses. 2-Event classification is only supported for auto mode. If the Si3452 auto mode and the first event classification result is Class 4, the mark, second event, and second mark are performed. Power is applied only if the second event is also Class 4 ...
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... If a command to read port current is issued and the port is off, the return value will be zero. 5.6. Device Status Register (0x1D) The device event bits are listed in Table 18. Bit The Si3452/3 has per-port thermal shutdown sensors as well a global thermal shutdown B6 - OverTemp at a slightly higher temperature. The global thermal shutdown bit of the device event register is set if this occurs. ...
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... Si3452/3 20 Rev. 1.0 ...
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... Rev. 1.0 Si3452/3 21 ...
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... Si3452/3 Table 22. Si3452/3 Port Mode Encoding 22 Table 20. Si3452/3 Detect Encoding Value Condition 000b Unknown 001b Short 010b Reserved 011b Rlow 100b Good 101b Rhigh 110b Ropen 111b Reserved Table 21. Si3452/3 Class Encoding Value Condition 000b Unknown 001b Class 1 010b Class 2 011b ...
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... Table 23. Si3452/3 Port Configuration PoE+ bit Class don’t care don’t care don’t care 0 *Note: During initial port turn-on (T START Table 24. Si3452/3 Command Codes Command CMD Register Power on port 0x04 | port no Power off port ...
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... Operational Notes 6.1. Port Turn On If the port is turned on by putting it in auto mode, the Si3452/3 will take care of all specified timing, and it will take care of the two-event classification if the first event result is Class 4 and PoE+ mode is enabled. However, if automatic mode operation is not desired after port turn-on, the port should be set to semi-auto or manual mode once it has powered ...
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... The thermal pad of the Si3452/3 is connected to VEE. At full IEEE 802.3at current of 600 mA on each port, the dissipation of the Si3452 1.2 W; so, multiple vias are required to conduct the heat from the thermal pad to the VEE plane. As many as 36 small vias provide the best thermal conduction. ...
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... Workaround: None 2 8. Address ACK Issue: Very rarely, the Si3452 may not ACK the I 2 Impact: This is allowed in the I C specification. Workaround: Retransmit the address byte if there is an ACK failure. ...
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... View Table 25. Si3452/3 Pin Descriptions Description Driver 1 VEE supply. Short to VEE, VEE2/3/4. Global PoE (–48 V nom.) or PoE+ (–54 V nom.) supply. Short to VEE1/2/3/4. 1.1 V nom. voltage reference from reference generator (for example, TLV431 or power management unit). Measurement data converter input. Short to AOUT. ...
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... Si3452/3 Table 25. Si3452/3 Pin Descriptions (Continued) Pin # Name Type 13 DET4 Analog I/O 14 SDA Digital I/O 15 GND34 Ground 16 SCL Digital I connect 18 DET3 Analog I/O 19 VDD Supply 20 VOUT3 Analog I/O 21 AD3 Digital I/O 22 VEE3 Supply 23 RST Digital input 24 AD3 Digital I/O 25 AD2 Digital I/O 26 AD2 Digital I/O 27 AD1 Digital I/O 28 AD0 ...
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... Table 25. Si3452/3 Pin Descriptions (Continued) Pin # Name Type 37 DET1 Analog I/O 38 RST Digital input 39 VOUT1 Analog I/O 40 INT Digital output ePAD Vee Supply Description Connection for port 1 detection and classification. See DET4 for detailed descrip- tion. Active low digital reset. Short to RST pin 23. ...
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... Si3452/3 10. Package Outline: 40-Pin QFN The Si3452/3 is packaged in an industry-standard, RoHS compliant Figure 7. 40-Pin QFN Mechanical Diagram Table 26. Package Diagram Dimensions Dimension aaa bbb ccc ddd eee Notes: 1. All dimensions shown are in millimeters (mm) unless otherwise noted. ...
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... A 4x4 array of 0.80 mm square openings on 1.05 mm pitch should be used for the center Vee pad. Card Assembly 10. A No-Clean, Type-3 solder paste is recommended. 11. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. Figure 8. PCB Land Pattern Min 0.50 BSC 5.42 REF Rev. 1.0 Si3452/3 Max 31 ...
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... Si3452/3 Table 27. PCB Land Pattern Dimensions (Continued) Dimension Notes: General 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification. 3. This Land Pattern Design is based on IPC-SM-782 guidelines. 4. All dimensions shown are at Maximum Material Condition (MMC). Least Material Condition (LMC) is calculated based on a Fabrication Allowance of 0 ...
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... Alt A Notes: 1. Add “R” to the end of the ordering part number to denote tape-and-reel option. E.g., Si3452-B01-GMR. 2. For alternative A, power is applied to wire pairs 1,2 and 3,6. For alternative B, power is applied to wire pairs 4,5 and 7,8 (the spare pairs in the case of 10/100 Ethernet). Conventionally, alternative B is used for midspan power injectors. For alternative B, detection is done with over 2 seconds between detection pulses avoid interfering with end-point equipment trying to provide power using alternative A ...
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... Si3452/3 13. Device Marking Diagram Line # Text Value 1 Si3452 Base part number. This is not the “Ordering Part Number” since it does not contain a specific revision. Refer to "12. Ordering Guide" on page 33. for complete ordering information. 2 XYY X = Device revision Firmware revision Device type extended commercial temp range industrial temp range. ...
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... Changed SDA and SCL input low to 0.85 V. Minor editorial corrections. Revision 0.47 to Revision 1.0 Added "8.4. Reading or Writing Unused Registers" on page 26. Clarified ePAD connection in Table 25, “Si3452/3 Pin Descriptions,” on page 27. Updated firmware revision in Ordering Guide from 2.78 to 2.79. Rev. 1.0 Si3452/3 35 ...
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... Si3452 ONTACT NFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...