SI3201-X-FS SILABS [Silicon Laboratories], SI3201-X-FS Datasheet - Page 91

• Manufacturer Part Number: SI3201-X-FS
• Manufacturer: SILABS [Silicon Laboratories]

5. Pin Descriptions: Si3233
Pin #
35
36
37
38
1
2
3
4
5
6
7
FSYNC
RESET
VDDA1
TEST2
SDCH
Name
SDCL
PCLK
IREF
INT
NC
CS
Chip Select.
Active low. When inactive, SCLK and SDI are ignored and SDO is high impedance. When
active, the serial port is operational.
Interrupt.
Maskable interrupt output. Open drain output for wire-ORed operation.
PCM Bus Clock.
Clock input.
Test.
Enables test modes for Silicon Labs internal testing. This pin should always be tied to
ground for normal operation.
No Connect.
Frame Synch.
8 kHz frame synchronization signal for the PCM bus. May be short or long pulse format.
Reset.
Active low input. Hardware reset used to place all control registers in the default state.
DC Monitor.
DC-DC converter monitor input used to detect overcurrent situations in the converter.
DC Monitor.
DC-DC converter monitor input used to detect overcurrent situations in the converter.
Analog Supply Voltage.
Analog power supply for internal analog circuitry.
Current Reference.
Connects to an external resistor used to provide a high accuracy reference current.
SRINGDC
STIPDC
FSYNC
RESET
QGND
CAPM
SDCH
CAPP
SDCL
V
IREF
NC
DDA1
Preliminary Rev. 0.5
10
11
12 13
1
2
3
4
5
6
7
8
9
38
14
37
15 16 17 18 19
36
35
34 33 32
Description
31
30
29
28
27
26
25
24
23
22
21
20
SDITHRU
DCDRV
DCFF
TEST1
GNDD
ITIPN
ITIPP
IRINGP
IRINGN
IGMP
VDDD
V
DDA2
Si3233
91