SI3201-X-FS SILABS [Silicon Laboratories], SI3201-X-FS Datasheet - Page 88

• Manufacturer Part Number: SI3201-X-FS
• Manufacturer: SILABS [Silicon Laboratories]

Si3233
4.3. SLIC Control
See descriptions of linefeed interface and power monitoring for guidelines on computing register values. All values
are represented in twos-complement format.
Note: The values of all indirect registers are undefined following the reset state. Shaded areas denote bits that can be read
88
Addr D15
15
16
17
18
19
20
21
22
23
24
25
26
27
64
66
Addr
15
16
17
18
19
and written but should be written to zeroes.
Loop Closure Threshold.
Loop closure detection threshold. This register defines the upper bounds threshold if hysteresis is
enabled (direct Register 108, bit 0). The range is 0–80 mA in 1.27 mA steps. See "2.2.6. Loop Clo-
sure Detection" on page 22.
Ring Trip Threshold.
Ring trip detection threshold during ringing. See "2.5.6. Ring Trip Detection" on page 31.
Common Mode Minimum Threshold for Speed-Up.
This register defines the negative common mode voltage threshold. Exceeding this threshold
enables a wider bandwidth of dc linefeed control for faster settling times. The range is 0–23.625 V in
0.375 V steps.
Common Mode Maximum Threshold for Speed-Up.
This register defines the positive common mode voltage threshold. Exceeding this threshold enables
a wider bandwidth of dc linefeed control for faster settling times. The range is 0–23.625 V in 0.375 V
steps.
Power Alarm Threshold for Transistors Q1 and Q2.
D14
D13
Table 36. SLIC Control Indirect Registers Description
Table 35. SLIC Control Indirect Registers Summary
LCRTL[5:0]
D12
RPTP[5:0]
LCRT[5:0]
VMIND[3:0]
PPT12[7:0]
PPT34[7:0]
PPT56[7:0]
VCMR[3:0]
D11
D10
CMH[5:0]
CML[5:0]
NCLR[12:0]
NRTP[12:0]
NQ12[12:0]
NQ34[12:0]
NQ56[12:0]
Preliminary Rev. 0.5
D9
D8
Description
D7
D6
D5
D4
D3
D2
D1
D0