vpx3224d ETC-unknow, vpx3224d Datasheet - Page 80

no-image

vpx3224d

Manufacturer Part Number
vpx3224d
Description
Video Pixel Decoders
Manufacturer
ETC-unknow
Datasheet
80
VPX 3225D, VPX 3224D
Address
Hex
h’140
h’141
Number
of Bits
12
12
Mode
w r
w
w
w
w
w
w
r
Register for control and latching
bit [1:0]:
bit [2]:
bit [4:3]:
bit [5]:
bit [6]:
bit [9]:
bit [10]:
bit [11]:
Internal status register, do not overwrite
This register can be used to query the current internal state due to the
settings in the control word.
bit [2]:
bit [4:3]:
bit [11:8]: reserved
Function
Sync timing mode
00 Open mode
10 Scan mode
Mode for VACT reference signal
0
1
reserved (must be set to zero)
Latch Window #1
1
Latch Window #2
1
reserved (must be set to zero)
Latch value for temporal decimation
The number of frames for the temporal decimation is
updated only if this flag is set
1
Latch Timing Modes
Selection of the timing mode is updated only if this flag is set
1
Mode for VACT reference signal
0
1
reserved
FP-RAM VPX Back-End
horizontal and vertical sync are tracking the input
signal
horizontal and vertical sync are free running
length of VACT corresponds to the size of the current
window
programmable length of VACT (for the whole field!)
latch (reset automatically)
latch (reset automatically)
latch (reset automatically)
latch (reset automatically)
current window size
programmable size
Control Word
Info Word
PRELIMINARY DATA SHEET
Default
0
0
0
1
1
0
1
1
Name
Control
Word
settm
vactmode
latwin1
latwin2
lattdec
lattm
InfoWord
actvact
Micronas

Related parts for vpx3224d