vpx3224d ETC-unknow, vpx3224d Datasheet - Page 55

• Manufacturer Part Number: vpx3224d
• Description: Video Pixel Decoders
• Manufacturer: ETC-unknow

Micronas
PRELIMINARY DATA SHEET
4.3.4. Characteristics, Analog Front-End and ADCs
Symbol
V
Luma – Path
R
C
V
V
AGC
DNL
V
Q
I
DNL
Chroma – Path
R
C
V
V
Dynamic Characteristics for all Video-Paths (Luma + Chroma)
BW
XTALK
THD
SINAD
INL
DNL
DG
DP
CL–LSB
VRT
VIN
VIN
VIN
VINCL
CIN
CINDC
VIN
CL
CIN
VIN
AGC
ICL
Parameter
Reference Voltage Top
Input Resistance
Input Capacitance
Full Scale Input Voltage
Full Scale Input Voltage
AGC step width
AGC Differential Non-Linearity
Input Clamping Level, CVBS
Clamping DAC Resolution
Input Clamping Current per step
Clamping DAC Differential
Non-Linearity
Input Resistance
SVHS Chroma
Input Capacitance
Full Scale Input Voltage, Chroma
Input Bias Level,
SVHS Chroma
Binary Code for Open
Chroma Input
Bandwidth
Crosstalk, any two video inputs
Total Harmonic Distortion
Signal to Noise and
Distortion Ratio
Integral Non-Linearity,
Differential Non-Linearity
Differential Gain
Differential Phase
Pin Name
VRT
VIN1,
VIN2
VIN2,
VIN3
CIN,
VIN1
CIN,
VIN1
CIN,
VIN1
VIN1
VIN1,
VIN2
VIN2,
VIN3,
CIN
CIN
Min.
2.5
1
1.86
0.5
0.145
–16
0.7
1.4
1.08
–
10
42
Typ.
2.61
5
1.93
0.6
0.163
1.0
1
2.0
5
1.14
1.5
128
14
–56
–48
46
1.3
0.5
VPX 3225D, VPX 3224D
Max.
2.72
2.0
0.7
0.181
15
1.3
2.6
1.2
–
–48
–45
1.5
0.5
0.5
2.4
0.85
3
Unit
V
MW
pF
V
V
dB
LSB
V
steps
mA
LSB
kW
pF
V
V
MHz
dB
dB
dB
LSB
LSB
%
deg
PP
PP
PP
Test Conditions
10 mF//10 nF, 1 GW Probe
Code clamp – DAC = 0
min. AGC Gain
max. AGC Gain
6-bit resolution = 63 Steps
f
f
– 2 dBr of max. AGC Gain
Binary Level = 68 LSB
min. AGC Gain
6 Bit – I–DAC, bipolar
V
V
–2 dBr input signal level
1 MHz, –2 dBr signal level
1 MHz, 5 harmonics,
–2 dBr signal level
1 MHz, all outputs,
–2 dBr signal level
Code Density,
DC ramp
DC-ramp
–12 dBr, 4.4 MHz signal on
DC Ramp
DC-Ramp
sig
i
VIN
VIN
= 1 MHz
= 1 MHz,
= 1 5 V
= 1.5 V
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