sza1000 NXP Semiconductors, sza1000 Datasheet - Page 17

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sza1000

Manufacturer Part Number
sza1000
Description
Qic Digital Equalizer
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
O/P
Address 35: O/P Select pins 21 and 29
Table 21 Output signal select: EQ MODE 0; see Tables 22 and 23
Table 22 Output signal: pin 21
Notes
1. GAP, STRIPE or QUAL may be selected to detect
2. See also Table 34.
3. The RD output (read pulse): falling edge active.
D
Address 36: Differentiator settings
Table 24 DIFF; note 1
Note
1. DL1 and DL2 are programmable delays for the differentiator; DS is the gain factor of the differentiated signal.
Table 25 Differentiator delay; notes 1 and 2
Notes
1. DL1 and DL2 are added to provide a maximum delay
2. It is advisable to have DL1 and DL2 equal to avoid
1998 Feb 16
IFFERENTIATOR FUNCTIONS
QIC digital equalizer
gaps, stripes or valid signal peaks. All are active HIGH.
of 6
adding unwanted delay in the differentiator.
SIGNAL FUNCTION
GAP
DLn
D7
D7
0
1
2
3
0
1
2
3
f
s
cycles.
D6
D6
:
OUTPUT SIGNAL ON PIN 21
PINS
DELAY IN f
21
AND
STRIPE
QUAL
GAP
RD
29
D5
D5
0
1
2
3
s
(3)
(1)
(2)
CYCLES
DS
D4
D4
17
Table 23 Output signal: pin 29
Table 26 Differentiator gain factor
DL2.1
PA.1
D3
D3
PA
DS
1
2
3
0
0
1
OUTPUT SCALING GAIN FACTOR
DL2.0
PA.0
D2
D2
OUTPUT SIGNAL ON PIN 29
f
1 - PACLK off
0 - PACLK off
0 - PACLK off
s
- PACLK on
GAP.1
DL1.1
D1
D1
4
2
Product specification
SZA1000
GAP.0
DL1.0
D0
D0

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