sza1000 NXP Semiconductors, sza1000 Datasheet - Page 15

• Manufacturer Part Number: sza1000
• Description: Qic Digital Equalizer
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Address 30: WEQ settings
Table 15 WEQ_SET1; notes 1 to 4, see also Tables 16 and 17.
Notes
1. If bit WDI_O is HIGH, the circuit output is a WD signal, else a WDI signal.
2. If bit WDI_I is HIGH, the circuit expects a WD signal at the input, else a WDI signal.
3. If the RESYNC bit is HIGH, the WEQ circuit resynchronizes its time buffer during a gap in the QIC 3010 or QIC 3020
4. TPS sets the position of the inserted write equalization pulse, TWS sets its width.
1998 Feb 16
QIC digital equalizer
WDI_O
format; this setting is only permitted if 6 time slots in a bit-cell are selected (N6 = 1; see Table 14).
D7
WDI_I
D6
handbook, halfpage
handbook, halfpage
RESYNC
Fig.7 Position and width of write equalization pulse.
1 T
1.5 T
2 T, etc. to 4 T
WD
WDI
D5
Fig.6 WD/WDI signal timing.
1
1
1
TPS2
D4
t d
0
0
0
15
0
0
1
TPS1
D3
t w
1
0
TPS0
MGG586
MGG587
1
D2
TWS1
D1
Product specification
SZA1000
TWS0
D0