cxd2548r Sony Electronics, cxd2548r Datasheet - Page 87

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cxd2548r

Manufacturer Part Number
cxd2548r
Description
Cd Digital Signal Processor With Built-in Digital Servo And Dac
Manufacturer
Sony Electronics
Datasheet

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§4-13. COUT Signal
The COUT signal is output to count the number of tracks during traverse, etc. It is basically generated by
loading the MIRR signal at both edges of the TZC signal. However, the used TZC signal can be selected and
there are two types of output methods according to the COUT signal application.
This is because some time is required to generate the MIRR signal, and it is necessary to delay the TZC signal
in accordance with the MIRR signal delay during high-speed traverse.
The COUT signal output method is switched with D16 when D19 = D18 = 1 and D17 = 0 are set with $3.
(When D16 = 1, for delayed phase and high-speed traverse.) In addition, the TZC signal delay can be selected
from two values with D14 of $36.
§4-14. Serial Readout Circuit
The following measurement and adjustment results can be read out from the SENS pin by inputting the
readout clock to the SCLK pin by $39. (See Fig. 4-12, Table 4-6 and "Description of SENS Signals".)
During readout, the upper 8 bits of the serial data must be 39 (Hex).
Specified commands
SCLK frequency
SCLK pulse width
Delay time
$390C VC AVRG measurement result
$3908
$3904
$391F RF AVRG measurement result
$3953
$3963
$391C TRVSC adjustment result
$391D FBIAS register value
For 1-track jumps, etc.
For High-speed traverse
Fast phase COUT signal generation with a fast phase TZC signal.
Reliable COUT signal generation with a delayed phase TZC signal.
Item
SCLK
XLAT
Serial Read Out Data
(SENS)
FE AVRG measurement result
TE AVRG measurement result
FCS AGCNTL coefficient result
TRK AGCNTL coefficient result
t
Symbol
f
t
t
DLS
SCLK
SPW
DLS
Table 4-6.
t
SPW
1/f
Min.
500
15
MSB
SCLK
Typ.
Fig. 4-12.
– 87 –
Max.
1
···
···
MHz
Unit
µs
ns
LSB
CXD2548R

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