cxd2548r Sony Electronics, cxd2548r Datasheet - Page 76

• Manufacturer Part Number: cxd2548r
• Description: Cd Digital Signal Processor With Built-in Digital Servo And Dac
• Manufacturer: Sony Electronics

§4-2. Digital Servo Block Master Clock (MCK)
The FSTI pin is the reference clock input pin. The internal master clock (MCK) is generated by dividing the
frequency of the signal input to FSTI. The frequency division ratio is 1/2 or 1/4.
Table 4-1 below shows the hypothetical case where the crystal clock generated from the digital signal
processor block is 2/3 frequency-divided and input to the FSTI pin by externally connecting the FSTI pin and
the FSTO pin.
The XT4D and XT2D command settings can be made with D13 and D12 of $3F. (Default = 0)
The digital servo block is designed with an MCK frequency of 5.6448MHz.
§4-3. AVRG (Average) Measurement and Compensation
The CXD2548R has a circuit that measures AVRG of RFDC, VC, FE, and TE and a circuit that compensates
them to control servo effectively.
AVRG measurement and compensation is necessary to initialize the CXD2548R, and is able to cancel the
offset by performing each AVRG measurement before playback operation and using these results for
compensation.
The level applied to the VC, FE, RFDC and TE pins can be measured by setting D15 (VLCM), D13 (FLM), D11
(RFLM) and D4 (TCLM) of $38 respectively to 1.
AVRG measurement consists of digitally measuring the level applied to each analog input pin by taking the
average of 256 samples, and then loading these values into the AVRG register.
AVRG measurement requires approximately 2.9ms to 5.8ms after the command is received.
During AVRG measurement, if the upper 8 bits of the serial data are 38 (Hex), the completion of AVRG
measurement operation can be confirmed through the SENS pin. (See Timing Chart 4-1.)
Mode
1
2
3
4
384Fs
384Fs
768Fs
768Fs
X'tal
XLAT
SENS
(= XAVEBSY)
FSTO
256Fs
256Fs
512Fs
512Fs
256Fs
256Fs
512Fs
512Fs
FSTI
XTSL
Max. 1µs
0
1
Timing Chart 4-1.
XT4D
Table 4-1.
0
0
1
0
– 76 –
2.9 to 5.8ms
XT2D
1
0
0
0
Frequency division ratio
Completion of AVRG measurement
1/2
1/2
1/4
1/4
Fs = 44.1kHz, : Don't care
MCK frequency
128Fs
128Fs
128Fs
128Fs
CXD2548R