em78p134n ELAN Microelectronics Corp, em78p134n Datasheet - Page 55

• Manufacturer Part Number: em78p134n
• Description: 8-bit Microcontroller With Otp Rom
• Manufacturer: ELAN Microelectronics Corp

Product Specification (V1.6) 06.02.2010
(This specification is subject to change without further notice)
If for some reasons, the specification of the instruction cycle is not suitable for certain
applications, try modifying the instruction as follows:
(A) Modify one instruction cycle to consist of 4 oscillator periods.
(B) Execute within two instruction cycles the "JMP", "CALL", "RET", "RETL", "RETI"
Case (A) is selected by the Code Option bit, called CLKS. One instruction cycle will
consist of two oscillator clocks if CLKS is Low, and four oscillator clocks if CLKS is high.
Note that once the 4 oscillator periods within one instruction cycle is selected under
Case (A), the internal clock source to TCC should be CLK=Fosc/4 , instead of Fosc/2
as illustrated in Figure 5-3.
In addition, the instruction set has the following features:
(1) Every bit of any register can be set, cleared, or tested directly.
(2) The I/O register can be regarded as general register. That is, the same instruction
Convention:
R = Register designator that specifies which one of the registers (including operation and general
b = Bit field designator that selects the value for the bit located in the register R and which affects
k = 8 or 10-bit constant or literal value
0 0000 0000 0000
0 0000 0000 0001
0 0000 0000 0010
0 0000 0000 0011
0 0000 0000 0100
0 0000 0000 rrrr
0 0000 0001 0000
0 0000 0001 0001
0 0000 0001 0010
0 0000 0001 0011
0 0000 0001 0100
Binary Instruction
purpose registers) is to be utilized by the instruction.
the operation.
can operate on the I/O register.
commands, or the conditional skip ("JBS", "JBC", "JZ", "JZA", "DJZ", "DJZA")
which were tested to be true. The instructions that are written to the program
counter, should also take two instruction cycles.
0000
0001
0002
0003
0004
000r
0010
0011
0012
0013
0014
Hex
Mnemonic
NOP
DAA
CONTW
SLEP
WDTC
IOW R
ENI
DISI
RET
RETI
CONTR
No Operation
Decimal Adjust A
A → CONT
0 → WDT, Stop oscillator
0 → WDT
A → IOCR
Enable Interrupt
Disable Interrupt
[Top of Stack] → PC
[Top of Stack] → PC,
Enable Interrupt
CONT → A
8-Bit Microcontroller with OTP ROM
Operation
Status Affected
EM78P134N
None
None
None
None
None
None
None
None
T, P
T, P
C
1
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