em78p134n ELAN Microelectronics Corp, em78p134n Datasheet - Page 11

• Manufacturer Part Number: em78p134n
• Description: 8-bit Microcontroller With Otp Rom
• Manufacturer: ELAN Microelectronics Corp

Product Specification (V1.6) 06.02.2010
(This specification is subject to change without further notice)
5.1 Operational Registers
5.1.1 R0 (Indirect Addressing Register)
R0 is not a physically implemented register. It is used as an indirect addressing
pointer. Any instruction using R0 as a pointer actually accesses data pointed by the
RAM Select Register (R4).
5.1.2 R1 (Timer Clock/Counter)
5.1.3 R2 (Program Counter) and Stack
cycle clock.
register.
structure is depicted in the following figure.
Incremented by an external signal edge, through the TCC pin, or by the instruction
External signal of TCC trigger pulse width must be greater than one instruction.
The signals to increase the counter are determined by Bit 4 and Bit 5 of the CONT
Writable and readable as any other registers.
Depending on the device type, R2 and hardware stack are 10-bit wide. The
R2 is set as all "0" when under Reset condition.
"JMP" instruction allows direct loading of the lower 10 program counter bits. Thus,
"JMP" allows the PC to go to any location within a page.
The configuration structure generates 1K×13 bits on-chip OTP ROM addresses to
the relative programming instruction codes. One program page is 1024 words
long.
Stack level 1
Stack level 2
Stack level 3
Stack level 4
Stack level 5
PC (A9~A0)
Figure 5-2 Program Counter Organization
8-Bit Microcontroller with OTP ROM
On-chip program
Interrupt vector
Reset vector
Memory
EM78P134N
3FFH
000H
00FH
003H
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