em78p134n ELAN Microelectronics Corp, em78p134n Datasheet - Page 52

• Manufacturer Part Number: em78p134n
• Description: 8-bit Microcontroller With Otp Rom
• Manufacturer: ELAN Microelectronics Corp

EM78P134N
8-Bit Microcontroller with OTP ROM
46 •
Mnemonic
Bit
1
0
Bit 12 Bit 11
0
-
-
5.12.1 Code Option Register (Word 0)
Bit 12: unused bit, set to 0 all the time.
Bits 10 ~ 9 (TYPE1 ~ TYPE0): these bits must always be set to 0 for EM78P134N
Bits 8 ~ 7 (LVR1 ~ LVR0): Low Voltage Reset enable bits
Bit 11 (CLKS): Instruction period selection bit
Bit 6 (RESETDG): Reset pin delete glitch function
Bit 5 (ENWDT): Watchdog timer enable bit.
Bit 4 (NRHL): Noise rejection high/low pulse defined bit
Bit 3 (NRE): Noise rejection enable bit
Bits 2 ~ 0 (PR2 ~ PR0): Protect Bits
4CLKS
2LCKS
CLKS
This bit must enable the WDTE register (IOCE register). Bit 7 must be disabled when
Port 6 pin change wake-up function is used.
LVR1, LVR0
TYPE1
Bit 10
High
Low
11
10
01
00
0: Two oscillator periods
1: Four oscillator periods
Refer to the Instruction Set section.
0: Enable
1: Disable
0: Enable Watchdog timer
1: Disable Watchdog timer
0: disable noise rejection
1: enable noise rejection
0: Pulses equal to 8/fc [s] are regarded as signal
1: Pulses equal to 32/fc [s] are regarded as signal
TYPE0
Bit 9
High
Low
LVR1 LVR0
Bit 8 Bit 7
High High
Low
Word 0
Low
VDD Reset Level
(This specification is subject to change without further notice)
RESETDG
Disable
Enable
2.4V
3.3V
4.0V
Bit 6
NOTE
NA (Power-on Reset)
Disable
Enable
Product Specification (V1.6) 06.02.2010
ENWDT NRHL
Bit 5
Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
32/fc
8/fc
VDD Release Level
Disabl
Enabl
NRE
e
e
2.6V
3.5V
4.2V
PR2 PR1 PR0
Disable
Enable