S12ATD10B8CV2 MOTOROLA [Motorola, Inc], S12ATD10B8CV2 Datasheet - Page 21

• Manufacturer Part Number: S12ATD10B8CV2
• Description: MC9S12DT128 Device User Guide V02.09
• Manufacturer: MOTOROLA [Motorola, Inc]

•
•
– The Byteflight pin functionality (BF_PSLM, BF_PERR, BF_PROK, BF_PSYN, TX_BF,
– Do not write MODRR1 and MODRR0 Bit of Module Routing Register (PIM_9DTB128 Block
– Do not write MODRR3 and MODRR2 Bit of Module Routing Register (PIM_9DTB128 Block
Pins not available in 80 pin QFP package for MC9S12DG128E, MC9S12DG128,
MC9S12DJ128E, and MC9S12DJ128
– Port H
– Port J[1:0]
– Port K
– Port M[7:6]
– Port P6
– Port S[7:4]
– PAD[15:8] (ATD1 channels)
Pins not available in 80 pin QFP package for MC9S12DB128
– Port H
– Port J[7:6, 1:0]
RX_BF) is not available on port PM7, PM6, PM5, PM4, PM3 and PM2, if using a derivative
without Byteflight (see Table 0-1).
User Guide), if using a derivative without CAN0 (see Table 0-1).
User Guide), if using a derivative without CAN4 (see Table 0-1).
In order to avoid floating nodes the ports should be either configured as outputs by setting the
data direction register (DDRH at Base+$0262) to $FF, or enabling the pull resistors by writing
a $FF to the pull enable register (PERH at Base+$0264).
Port J pull-up resistors are enabled out of reset on all four pins (7:6 and 1:0). Therefore care must
be taken not to disable the pull enables on PJ[1:0] by clearing the bits PERJ1 and PERJ0 at
Base+$026C.
Port K pull-up resistors are enabled out of reset, i.e. Bit 7 = PUKE = 1 in the register PUCR at
Base+$000C. Therefore care must be taken not to clear this bit.
PM7:6 must be configured as outputs or their pull resistors must be enabled to avoid floating
inputs.
PP6 must be configured as output or its pull resistor must be enabled to avoid a floating input.
PS7:4 must be configured as outputs or their pull resistors must be enabled to avoid floating
inputs.
Out of reset the ATD1 is disabled preventing current flows in the pins. Do not modify the ATD1
registers!
In order to avoid floating nodes the ports should be either configured as outputs by setting the
data direction register (DDRH at Base+$0262) to $FF, or enabling the pull resistors by writing
a $FF to the pull enable register (PERH at Base+$0264).
Port J pull-up resistors are enabled out of reset on all four pins (7:6 and 1:0). Therefore care must
be taken not to disable the pull enables on PJ[7:6, 1:0] by clearing the bits PERJ7, PERJ6,
PERJ1 and PERJ0 at Base+$026C.
MC9S12DT128 Device User Guide — V02.09
21