TSS463-AAR ATMEL [ATMEL Corporation], TSS463-AAR Datasheet - Page 38

• Manufacturer Part Number: TSS463-AAR
• Description: VAN Data Link Controller with Serial Interface
• Manufacturer: ATMEL [ATMEL Corporation]

Channel Registers
38
TSS463-AA
There is a total of 14 channel register sets, each occupying 8 bytes for addressing sim-
plicity, integrated into the circuit. Each set contains two 2 x 8-bit registers for the
identifier tag, identifier mask and command fields plus two 1 x 8-bit registers for DMA
pointers and message status.
The base_address of each set is:
(0x10 + [0x08 * channel_number]).
When the TSS463AA is reset either via the external RESET pin or the general reset
command, the channel registers are not affected. That is, on power-up of the circuit, all
the channel registers start with random values.
Due to this fact, the user should take care to initialize all the channel registers before
exiting from idle mode. The easiest way to disable a channel register is to set the
received and transmitted bits to 1 in the Message Length and Status Register.
Table 8. Channel Register Sets Map
Table 9. Channel Register Set Structure
(No register)
(No register)
Reg. Name
MESS_PTR
Channel Number
ID_MASK
ID_MASK
MESS_L/
ID_TAG/
ID_TAG
CMD
STA
6
5
4
3
2
1
0
Offset
0x07
0x06
0x05
0x04
0x03
0x02
0x01
0x00
from
0x40
0x38
0x30
0x28
0x20
0x18
0x10
DRACK
Bit 7
x
x
Bit 6
ID_T [3: 0]
0x47
0x3F
0x37
0x2F
0x27
0x1F
0x17
ID_M [3:0]
x
x
to
M_L [4:0]
Bit 5
x
x
Channel Number
Bit 4
ID_M [11:4]
ID_T [11:4]
x
x
13
12
11
10
9
8
7
M_P [6:0]
Bit 3
EXT
x
x
x
CHER
Bit 2
RAK
from
x
x
x
0x78
0x70
0x68
0x60
0x58
0x50
0x48
4205B–AUTO–12/04
CHTx
Bit 1
RNW
x
x
x
0x7F
0x77
0x6F
0x67
0x5F
0x57
0x4F
to
CHRx
bit 0
RTR
x
x
x