TSS463-AAR ATMEL [ATMEL Corporation], TSS463-AAR Datasheet - Page 18

• Manufacturer Part Number: TSS463-AAR
• Description: VAN Data Link Controller with Serial Interface
• Manufacturer: ATMEL [ATMEL Corporation]

Frame Examples
18
TSS463-AA
However, since the CRC is calculated automatically from the identifier, command and
data fields by the TSS463AA, therefore, the user should not be concerned with the cir-
cuit. When the frame check sequence has been transmitted, the transmitting module
must transmit an End of Data (EOD) sequence, followed by the ACKnowledge field
(ACK) and the End of Frame sequence (EOF) to terminate the transfer.
Figure 16. Acknowledge Sequences
The frames transmitted on the VAN bus are generated by several modules, each sup-
plying different parts of the message. Figure 17 through Figure 20 show the four frame
types specified in the VAN standard, and the module that is generating the different
fields.
•
During this frame, there is basically only one module transmitting with the exception of
the acknowledgement, generated by the receiving module if requested in the RAK bit.
•
The only difference for the frame on the bus is that the R/W bit has changed state com-
pared to the normal frame.
This is a highly interactive frame where a bus master generates the SOF and the initia-
tor generates the identifier, the three first bits of the command, and the acknowledge.
The RTR bit, the data field, the frame check, the EOD and the EOF are all generated by
the replying module.
•
During this frame, the requested module will only generate the acknowledge, and only if
this was requested by the initiator through the RAK bit.
•
This frame very closely mimics the normal data frame with the exception is the R/W bit
that has changed state.
The most straightforward frame is the normal data frame in Figure 17. Like all other
frames, it is initiated with a SOF sequence. This sequence is generated by a bus
master (not shown in the figure).
The reply request frame with immediate reply in Figure 18 is the only frame in which
a slave module can transmit data by filling it into the appropriate field.
The reply request frame with deferred reply in Figure 19 is basically the same frame
as the reply request frame with immediate reply, but since the requested module
does not generate the RTR bit the requesting module will continue with the frame
check, the EOD and the EOF.
Finally, the deferred reply frame in Figure 20 which is sent when a module has
prepared a reply for a reply request that has been received earlier.
VAN BUS
SEQUENCE
VAN BUS
SEQUENCE
NUMBER OF
PRESCALED
CLOCKS
0
8
POSITIVE ACKNOWLEDGE
ABSENT ACKNOWLEDGE
16
24
32
4205B–AUTO–12/04