TSS463-AAR ATMEL [ATMEL Corporation], TSS463-AAR Datasheet - Page 30

• Manufacturer Part Number: TSS463-AAR
• Description: VAN Data Link Controller with Serial Interface
• Manufacturer: ATMEL [ATMEL Corporation]

Ma, Mb: Operating Mode
Command Bits
ETIP: Enable Transmission In
Progress
ESDC: Enable System
Diagnosis Clock
Command Register (0x03)
GRES: General Reset
SLEEP: Sleep Command
30
TSS463-AA
Table 7. Diagnosis System Command Bits
The Transmission In Progress (TIP) tells the diagnosis system to enable transmission
diagnosis.
One: Enable TIP generation
Zero: Disable TIP generation.
The Synchronous Diagnosis Clock (SDC) controls the cycle time of the synchronous
diagnosis.
One: Enable SDC divider.
Zero: Disable SDC divider.
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•
•
The Reset circuit command bit performs, if set, exactly as if the external reset pin was
asserted. This command bit has its own auto-reset circuitry.
One: Reset active
Zero: Reset inactive
(See Section “Sleep Command”, page 52).If the user sets the Sleep bit, the circuit will
enter sleep mode. When the circuit is in sleep mode, all non-user registers are setup to
minimize power consumption. Read/write accesses to the TSS463AA via the SPI/SCI
interface are impossible, the oscillator is stopped.
To exit from this mode the user must apply either an hardware reset (external RESET
pin) or an asynchronous software reset (via the SPI/SCI interface).
One: Sleep active
Zero: Sleep inactive
GRES
Write only register.
Reserved: Bit 1, 2 these bits must not be set by the user; a zero must always be
written to these bit.
If the circuit is operating at low bitrates there might be a considerable delay between
the writing of this register and the performing of the actual command (worst case 6
timeslots). The user is therefore recommended to verify, by reading the Line Status
Register (0x04), that the commands have been performed.
7
Ma
0
0
1
1
SLEEP
6
IDLE
5
Mb
0
1
0
1
ACTI
4
Forces the Communication on RxD0 (differential)
Forces the Communication on RxD2 (DATA)
Forces the Communication on RxD1 (DATA)
REAR
3
Automatic selection
2
0
1
0
4205B–AUTO–12/04
MSDC
0