IDT7202 IDT [Integrated Device Technology], IDT7202 Datasheet - Page 2

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IDT7202

Manufacturer Part Number
IDT7202
Description
CMOS ASYNCHRONOUS FIFO WITH RETRANSMIT 1K x 9, 2K x 9, 4K x 9
Manufacturer
IDT [Integrated Device Technology]
Datasheet

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IDT72021, IDT72031, IDT72041
CMOS ASYNCHRONOUS FIFO WITH RETRANSMIT 1K x 9, 2K x 9, 4K x 9
PIN CONFIGURATIONS
PIN DESCRIPTIONS
Symbol
D
RS
W
R
FL
XI
OE
FF
EF
AEF
XO
Q
0
0
/
–D
–Q
RT
/
HF
INDEX
8
8
AEF
Q
Q
Q
D
D
D
FF
XI
2
1
0
0
1
2
Name
Inputs
Reset
Write
Read
First Load/
Expansion In
Output Enable
Full Flag
Empty Flag
Almost-Empty/
Almost-Full Flag
Expansion Out/
Half-Full Flag
Outputs
Retransmit
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19 20
4 3 2
PLCC TOP VIEW
J32-1
1
I/O
O
O
O
O
O
I
I
I
I
I
I
I
32 31 30
Data inputs for 9-bit wide data.
When
array.
after power-up.
When WRITE is LOW, data can be written into the RAM array sequentially, independent of
READ. In order for WRITE to be active,
the internal WRITE operation is blocked.
When READ is LOW, data can be read from the RAM array sequentially, independent of
WRITE. In order for READ to be active,
the internal READ operation is blocked. The three-state output buffer is controlled by the read
signal and the external output control
This is a dual-purpose input. In the single device configuration (
retransmit (
on the WRITE pointer.
compatible with depth expansion. In the depth expansion configuration,
the first activated device.
In the single device configuration,
XI
When
of an active READ operation. A read operation does increment the read pointer in this situation.
When
a complete READ operation with data appearing on Q
LOW.
When
is HIGH, the device is not full.
When
is HIGH, the device is not empty.
When
the device is greater than 1/8 full, but less than 7/8 full.
This is a dual purpose output. In the single device configuration (
more than half full when
XI
filled.
Data outputs for 9-bit wide data.
is connected to
of the next device), a pulse is sent from
RS
OE
EF
AEF
HF
OE
FF
29
28
27
26
25
24
23
22
21
goes LOW, the device is empty and further READ operations are inhibited. When
is set LOW, internal READ and WRITE pointers are set to the first location of the RAM
goes LOW, the device is full and further WRITE operations are inhibited. When
and
is set HIGH, the data flow through the three-state output buffer is inhibited regardless
is set LOW, Q
is LOW, the device is empty to 1/8 full or 7/8 to completely full. When
FL
/
FF
2677 drw 03
RT
D
D
FL
RS
OE
EF
XO
Q
Q
R
go HIGH, and
-LOW) will set the internal READ pointer to the first location. There is no effect
6
7
7
6
/
XO
and
RT
/
HF
(expansion out) of the previous device.
W
R
5.09
0
HF
-Q
and
must be HIGH during
8
is LOW. In the depth expansion configuration (
are still in a HIGH impedance condition if no READ occurs. For
W
AEF
must be HIGH before setting
XI
and
is grounded. In depth expansion or daisy chain expansion,
(OE
Description
EF
EF
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FF
).
must be HIGH. When the FIFO is empty (
XO
go LOW. A reset is required before an initial WRITE
GND
must be HIGH. When the FIFO is full (
AEF
V
Q
Q
Q
D
D
D
D
D
FF
Q
Q
CC
W
XI
to
8
3
2
1
0
0
1
2
3
8
RS
XI
when the last location in the RAM array is
2
4
5
6
10
12
13
14
15
16
cycle.
1
3
7
8
9
11
0
DIP TOP VIEW
-Q
8
, both
D32-1
FL
R
/
RT
and
XI
XI
grounded), the device is
LOW. Retransmit is not
31
32
30
28
27
26
24
29
25
23
22
21
20
19
18
17
OE
grounded), activating
FL
should be asserted
/
RT
XO
V
D
D
D
D
FL
RS
OE
EF
XO
Q
Q
Q
Q
R
GND
-LOW indicates
CC
4
5
6
7
7
6
5
4
/
RT
/
2677 drw 02
HF
AEF
connected to
EF
FF
is HIGH,
-LOW),
-LOW),
2677 tbl 01
EF
2
FF

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