HFA3524IA96 INTERSIL [Intersil Corporation], HFA3524IA96 Datasheet - Page 10

• Manufacturer Part Number: HFA3524IA96
• Description: 2.5GHz/600MHz Dual Frequency Synthesizer
• Manufacturer: INTERSIL [Intersil Corporation]

Programmable Divide (N Counter)
The N counter consists of the 7-bit swallow counter (A counter) and the 11-bit programmable counter (B counter). If the Control
Bits are 10 or 11 (10 for IF counter and 11 for RF counter) data is transferred from the 22-bit shift register into a 4-bit or 7-bit latch
(which sets the Swallow (A) Counter) and an 11-bit latch (which sets the 11-bit programmable (B) Counter), MSB first. Serial data
format is shown below. For the IF N counter bits 5, 6, and 7 are don’t care bits. The RF N counter does not have don’t care bits.
7-Bit Swallow Counter Divide Ratio (A Counter)
NOTES:
X = Don’t care condition.
NOTES:
12. Divide ratio 0 to 127.
13. B
14. Divide ratio 3 to 2047 (divide ratios less than 3 are prohibited).
15. B
11-BIT PROGRAMMABLE COUNTER DIVIDE RATIO (B COUNTER
RATIO B
RATIO A
RATIO A
DIVIDE
DIVIDE
DIVIDE
LSB
2047
C1
(Control bits)
127
15
3
4
0
1
0
1
A.
A.
C2
18
N
0
0
1
N
N
7
0
0
1
7
X
X
X
N
17
1
N
0
0
1
16
N
N
X
X
X
N
6
0
0
1
6
0
0
1
N
2
15
N
0
0
1
N
3
N
N
X
X
X
5
0
0
1
5
10
RF
IF
14
N
0
0
1
N
4
13
N
0
0
1
N
N
4
0
0
1
4
0
0
1
Divide ratio of the programmable divider, N
12
N
5
N
0
0
1
N
N
3
0
0
1
3
0
0
1
11
N
0
0
1
N
6
10
N
0
1
1
N
N
2
0
0
1
2
0
0
1
N
7
N
9
1
0
1
N
N
N
1
0
1
1
1
0
1
1
8
N
8
1
0
1
HFA3524
N
9
10
N
Pulse Swallow Function
f
f
B:
A:
f
R:
P:
Programmable Modes
Several modes of operation can be programmed with bits
R16-R19 including the phase detector polarity, charge pump
High Z State and the output of the F
and powerdown modes are selected with bits N19 and N20.
The programmable modes are shown in Table 1. Truth table
for the programmable modes and F
Table 2 and Table 3.
VCO
VCO
OSC
C1 C2
0
0
11
N
: Output frequency of external voltage controlled
: Output frequency of the external reference frequency
= [(P x B) + A] x f
oscillator (VCO)
Preset divide ratio of binary 11-bit programmable
counter (3 to 2047)
Preset divide ratio of binary 7-bit swallow counter
(0
oscillator
Preset divide ratio of binary 15-bit programmable
reference counter (3 to 32767)
Preset modulus of dual modulus prescaler
(for IF: P = 8 or 16; for RF: P = 32 or 64)
0
1
C1
IF Phase
Detector Polarity
RF Phase
Detector Polarity
12
1
1
N
A
TABLE 1. PROGRAMMABLE MODES
127 {RF}, 0
C2
13
R16
0
1
N
IF Prescaler
RF Prescaler
14
N
OSC
N19
RF I
IF I
15
N
/R
R17
A
CPO
CPO
15 {IF}, A
16
N
O
IF D
High Z
RF D
High Z
O
/LD output are shown in
Powerdown IF
Powerdown RF
R18
/LD pin. The prescaler
17
O
N
O
N20
B)
18
RF LD
N
IF LD
R19
Program
19
N
RF F
IF F
R20
MSB
20
N
O
O