M25PX64-SOVME6F NUMONYX [Numonyx B.V], M25PX64-SOVME6F Datasheet - Page 52

• Manufacturer Part Number: M25PX64-SOVME6F
• Description: 64-Mbit, dual I/O, 4-Kbyte subsector erase, serial flash memory with 75 MHz SPI bus interface
• Manufacturer: NUMONYX [Numonyx B.V]

Instructions
6.19
52/66
Release from deep power-down (RDP)
Once the device has entered the deep power-down mode, all instructions are ignored
except the release from deep power-down (RDP) instruction. Executing this instruction
takes the device out of the deep power-down mode.
The release from deep power-down (RDP) instruction is entered by driving Chip Select (S)
Low, followed by the instruction code on serial data input (DQ0). Chip Select (S) must be
driven Low for the entire duration of the sequence.
The instruction sequence is shown in
The release from deep power-down (RDP) instruction is terminated by driving Chip Select
(S) High. Sending additional clock cycles on Serial Clock (C), while Chip Select (S) is driven
Low, cause the instruction to be rejected, and not executed.
After Chip Select (S) has been driven High, followed by a delay, t
standby mode. Chip Select (S) must remain High at least until this period is over. The device
waits to be selected, so that it can receive, decode and execute instructions.
Any release from deep power-down (RDP) instruction, while an erase, program or write
cycle is in progress, is rejected without having any effects on the cycle that is in progress.
Figure 27. Release from deep power-down (RDP) instruction sequence
S
C
DQ0
DQ1
High Impedance
0
1
2
Instruction
3
4
5
6
Figure
7
27.
Deep power-down mode
t
RDP
RDP
, the device is put in the
Standby mode
M25PX64
AI13745