k4b2g0446e Samsung Semiconductor, Inc., k4b2g0446e Datasheet - Page 11
k4b2g0446e
Manufacturer Part Number
k4b2g0446e
Description
Ddp 2gb E-die Ddr3 Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.K4B2G0446E.pdf
(59 pages)
- Current page: 11 of 59
- Download datasheet (2Mb)
K4B2G0446E
K4B2G0846E
5.0 DDR3 SDRAM Addressing
1Gb
2Gb
4Gb
8Gb
Note 1 : Page size is the number of bytes of data delivered from the array to the internal sense amplifiers when an ACTIVE command is registered.
Page size is per bank, calculated as follows:
where, COLBITS = the number of column address bits,
BC switch on the fly
BC switch on the fly
BC switch on the fly
BC switch on the fly
Column Address
Column Address
Column Address
Column Address
Auto precharge
Auto precharge
Auto precharge
Auto precharge
Configuration
Configuration
Configuration
Configuration
Bank Address
Bank Address
Bank Address
Bank Address
Row Address
Row Address
Row Address
Row Address
Page size
Page size
Page size
Page size
# of Bank
# of Bank
# of Bank
# of Bank
*1
*1
*1
*1
A
0
256Mb x 4
512Mb x 4
BA0 - BA2
A
BA0 - BA2
A
BA0 - BA2
A
BA0 - BA2
1Gb x 4
2Gb x 4
- A
A
A
A
A
0
0
0
A
A
A
A
A
A
A
A
1 KB
1 KB
1 KB
2 KB
0
0
0
0
- A
- A
- A
10
12
10
12
10
12
10
12
9,
- A
- A
- A
- A
8
8
8
8
/AP
/BC
/AP
/BC
/AP
/BC
/AP
/BC
A
9,
9,
9,
page size = 2
11,
13
A
14
A
15
A
15
Page 11 of 59
11
11
11
A
ORG = the number of I/O (DQ) bits
13
COLBITS
* ORG
128Mb x 8
256Mb x 8
512Mb x 8
A
BA0 - BA2
BA0 - BA2
BA0 - BA2
BA0 - BA2
÷
1Gb x 8
A
A
A
A
0
A
A
A
A
8
A
A
A
A
A
A
A
0
1 KB
0
1 KB
0
1 KB
0
2 KB
- A
10
12
10
12
10
12
10
12
0
0
0
- A
- A
- A
- A
8
8
8
8
- A
- A
- A
/AP
/BC
/AP
/BC
/AP
/BC
/AP
/BC
9,
13
14
15
15
A
9
9
9
DDP 2Gb DDR3 SDRAM
11
Rev. 1.0 March 2009
128Mb x 16
256Mb x 16
512Mb x 16
64Mb x 16
BA0 - BA2
BA0 - BA2
BA0 - BA2
BA0 - BA2
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
2 KB
2 KB
2 KB
2 KB
0
0
0
0
12
12
12
12
10
0
10
0
10
0
10
0
- A
- A
- A
- A
8
8
8
8
- A
- A
- A
- A
/BC
/BC
/BC
/BC
/AP
/AP
/AP
/AP
12
13
14
15
9
9
9
9
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