m393b5173dz1 Samsung Semiconductor, Inc., m393b5173dz1 Datasheet - Page 53
m393b5173dz1
Manufacturer Part Number
m393b5173dz1
Description
Ddr3 Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.M393B5173DZ1.pdf
(64 pages)
- Current page: 53 of 64
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Figure 15 - Illustration of tangent line for setup time tDS (for DQ with respect to strobe) and tIS
Registered DIMM
Note :Clock and Strobe are drawn on a different time scale.
(for ADD/CMD with respect to clock)
V
V
V
V
V
V
IL
IL
REF
DDQ
IH
IH
(DC) max
(AC) max
(AC) min
(DC) min
Setup Slew Rate
(DC)
Falling Signal
CK
DQS
DQS
CK
V
nominal
SS
line
V
region
REF
=
Delta TF
tangent line[V
to ac
Delta TF
tDS
tIS
tangent
REF
line
(DC) - V
Setup Slew Rate
tDH
53 of 64
tIH
Rising Signal
IL
(AC)max]
nominal
line
Delta TR
=
tangent line[V
tDS
tIS
tVAC
tangent
line
Delta TR
IH
tDH
tIH
(AC)min - V
V
REF
region
to ac
Rev. 1.1 August 2008
REF
(DC)]
DDR3 SDRAM
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