m393b5173dz1 Samsung Semiconductor, Inc., m393b5173dz1 Datasheet - Page 52
m393b5173dz1
Manufacturer Part Number
m393b5173dz1
Description
Ddr3 Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.M393B5173DZ1.pdf
(64 pages)
- Current page: 52 of 64
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Figure 14 - Illustration of nominal slew rate for hold time tDH (for DQ with respect to strobe) and tIH
Registered DIMM
Note :Clock and Strobe are drawn on a different time scale.
(for ADD/CMD with respect to clock).
Hold Slew Rate
V
V
V
V
V
V
Rising Signal
IL
IL
REF
DDQ
IH
IH
(DC) max
(AC) max
(AC) min
(DC) min
(DC)
CK
DQS
DQS
CK
V
SS
dc to V
dc to V
region
region
=
V
REF
REF
REF
Delta TR
(DC) - V
slew rate
tDS
nominal
tIS
IL
(DC)max
tDH
52 of 64
tIH
Delta TR
Hold Slew Rate
Falling Signal
nominal
slew rate
dc to V
region
tDS
tIS
=
V
IH
REF
tDH
(DC)min - V
tIH
Delta TF
Delta TF
Rev. 1.1 August 2008
REF
(DC)
DDR3 SDRAM
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