m393b5173dz1 Samsung Semiconductor, Inc., m393b5173dz1 Datasheet - Page 50

• Manufacturer Part Number: m393b5173dz1
• Description: Ddr3 Sdram
• Manufacturer: Samsung Semiconductor, Inc.

18.4 Data Setup, Hold and Slew Rate Derating:
For all input signals the total tDS (setup time) and tDH (hold time) required is calculated by adding the data sheet tDS(base) and tDH(base) value to the ∆
tDS and ∆tDH derating value respectively. Example: tDS (total setup time) = tDS(base) + ∆tDS.
Setup (tDS) nominal slew rate for a rising signal is defined as the slew rate between the last crossing of V
Setup (tDS) nominal slew rate for a falling signal is defined as the slew rate between the last crossing of V
If the actual signal is always earlier than the nominal slew rate line between shaded ’V
the actual signal is later than the nominal slew rate line anywhere
between shaded ’V
Hold (tDH) nominal slew rate for a rising signal is defined as the slew rate between the last crossing of V
Hold (tDH) nominal slew rate for a falling signal is defined as the slew rate between the last crossing of V
the actual signal is always later than the nominal slew rate line between shaded ’dc level to V
the actual signal is earlier than the nominal slew rate line anywhere between shaded ’dc to V
signal from the dc level to V
For a valid transition the input signal has to remain above/below V
Although for slow slew rates the total setup time might be negative (i.e. a valid input signal will not have reached V
transition) a valid input signal is still required to complete the transition and reach V
For slew rates in between the values listed in the tables the derating values may obtained by linear interpolation.
These values are typically not subject to production test. They are verified by design and characterization
Data Setup and Hold Base-Value
Note : AC/DC referenced for 1V/ns DQ-slew rate and 2 V/ns DQS slew rate)
Derating values DDR3-1066/1333 tIS/tIH-ac/dc based
Note : a. Cell contents shaded in red are defined as ’not supported’.
Required time t
Registered DIMM
DDR3
DDR3
1333/
1066
1600
800/
-
-
Slew
Slew
V/ns
V/ns
rate
rate
DQ
DQ
Slew Rate[V/ns]
tDH(base)
tDS(base)
2.0
1.5
1.0
0.9
0.8
0.7
0.6
0.5
0.4
2.0
1.5
1.0
0.9
0.8
0.7
0.6
0.5
0.4
VAC
>2.0
<0.5
2.0
1.5
1.0
0.9
0.8
0.7
0.6
0.5
[ps]
REF
above V
∆tDS
(DC) to ac region’, the slew rate of a tangent line to the actual signal from the ac level to dc level is used for derating value.
88
59
75
50
0
0
-
-
-
-
-
-
-
-
-
-
-
-
4.0 V/ns
REF
IH
∆tDH
(AC) {blow V
(DC) level is used for derating value.
50
34
50
34
0
0
-
-
-
-
-
-
-
-
-
-
-
-
∆tDS
88
59
75
50
-2
0
0
0
-
-
-
-
-
-
-
-
-
-
3.0 V/ns
IL
(AC)} for valid transition
∆tDH
50
34
50
34
-4
-4
DDR3-800
0
0
-
-
-
-
-
-
-
-
-
-
min
75
57
50
38
34
29
22
13
0
0
150
75
t
VAC
∆tDS, ∆tDH Derating [ps] AC/DC based
∆tDS
88
59
75
50
-2
-6
0
0
0
0
[ps] DDR3-800/1066
-
-
-
-
-
-
-
-
2.0 V/ns
∆tDH
-10
-10
50
34
50
34
-4
-4
0
0
IH/IL
-
-
-
-
-
-
-
-
DQS,DQS Differential Slew Rate
(AC) for some time tVAC.
∆tDS
50 of 64
DDR3-1066
67
58
-3
8
6
2
8
8
8
8
-
-
-
-
-
-
-
-
1.8 V/ns
100
25
max
∆tDH
-
-
-
-
-
-
-
-
-
-
42
42
-2
-8
-2
-8
8
4
8
4
-
-
-
-
-
-
-
-
IH/IL
REF
(AC).
∆tDS
16
14
10
16
16
16
16
15
-1
(DC) to ac region’, use nominal slew rate for derating value. If
5
-
-
-
-
-
-
-
-
1.6 V/ns
REF
REF
(DC) region’, the slew rate of a tangent line to the actual
∆tDH
(DC) region’, use nominal slew rate for derating value. If
a
DDR3-1333
-10
-10
16
12
16
12
6
0
6
0
-
-
-
-
-
-
-
-
30
65
∆tDS
IH
-11
IL
22
18
13
24
24
24
23
14
REF
REF
(DC)min and the first crossing of V
7
-
-
-
-
-
-
-
-
1.4V/ns
min
(DC)max and the first crossing of V
175
170
167
163
162
161
159
155
155
150
(DC) and the first crossing of V
(DC) and the first crossing of V
∆tDH
t
Rev. 1.1 August 2008
VAC
-16
-16
IH/IL
20
14
20
14
-2
-2
8
8
-
-
-
-
-
-
-
-
[ps] DDR3-1333
(AC) at the time of the rising clock
∆tDS
DDR3 SDRAM
-30
26
21
15
32
32
31
22
-2
7
-
-
-
-
-
-
-
-
1.2V/ns
reference
V
∆tDH
V
-26
-26
24
18
24
18
IH/L
IH/L
-6
-6
8
8
-
-
-
-
-
-
-
-
(AC)
(DC)
max
∆tDS
-
-
-
-
-
-
-
-
-
-
-22
29
23
40
39
30
15
6
-
-
-
-
-
-
-
-
-
-
1.0V/ns
IL
REF
IH
(AC)max.
(AC)min.
REF
(DC). If
∆tDH
(DC).
-10
-10
34
24
10
34
24
10
-
-
-
-
-
-
-
-
-
-