mt18vddt12872phg-335 Micron Semiconductor Products, mt18vddt12872phg-335 Datasheet - Page 10

• Manufacturer Part Number: mt18vddt12872phg-335
• Description: 1gb X72, Ecc, Pll 200-pin Ddr Sdram Sodimm
• Manufacturer: Micron Semiconductor Products

reserved for future use and/or test modes. Test modes
and reserved states should not be used because
unknown operation or incompatibility with future ver-
sions may result.
Extended Mode Register
beyond those controlled by the mode register; these
additional functions are DLL enable/disable and out-
put drive strength. These functions are controlled via
the bits shown in the Extended Mode Register Defini-
tion Diagram. The extended mode register is pro-
grammed via the LOAD MODE REGISTER command
to the mode register (with BA0 = 1 and BA1 = 0) and
will retain the stored information until it is pro-
grammed again or the device loses power.
enabling of the DLL should always be followed by a
LOAD MODE REGISTER command to the mode regis-
ter (BA0, BA1 both low) to reset the DLL.
all device banks are idle and no bursts are in progress,
and the controller must wait the specified time before
initiating any subsequent operation. Violating either
of these requirements could result in unspecified oper-
ation.
DLL Enable/Disable
DLL enable is required during power-up initialization
and upon returning to normal operation after having
pdf: 09005aef81697898/source: 09005aef8169786e
DD18C128x72PHG.fm - Rev. A 10/04 EN
All other combinations of values for A7–A12 are
The extended mode register controls functions
The extended mode register must be loaded when
The DLL must be enabled for normal operation.
The
10
disabled the DLL for the purpose of debug or evalua-
tion. (When the device exits self refresh mode, the DLL
is enabled automatically.) Any time the DLL is enabled,
200 clock cycles must occur before a READ command
can be issued.
NOTE:
2. The QFC# option is not supported.
1. E14 and E13 (BA1 and BA0) must be “0, 1” to select the
E12
0
14
BA1 BA0
0
–
1
Extended Mode Register (vs. the base Mode Register).
Figure 6: Extended Mode Register
1
200-PIN DDR SDRAM SODIMM
13
E11
1
0
–
Micron Technology, Inc., reserves the right to change products or specifications without notice.
12
E10
A12
0
–
11
A11
E9
0
–
10
E8
A10
0
–
Definition Diagram
Operating Mode
E7
9
0
–
A9
E6 E5
0
–
8
A8
0
–
7
1GB (x72, ECC, PLL)
A7 A6 A5 A4 A3
E4
0
–
6
E3
0
–
5
E2
©2004 Micron Technology, Inc. All rights reserved.
0
–
4
3
E1,
Valid
–
2
E0
A2 A1 A0
DS
1
E1
DLL
0
0
Operating Mode
Reserved
Reserved
E0
0
1
Extended Mode
Register (Ex)
Drive Strength
Address Bus
Normal
Disable
Enable
DLL