am49lv128bm Meet Spansion Inc., am49lv128bm Datasheet - Page 4

• Manufacturer Part Number: am49lv128bm
• Description: Stacked Multi-chip Package Mcp ,128 Megabit 8 M ? 16-bit ,uniform Sector Flash Memory And 32 Mbit 2 M ? 16-bit Pseudo-static Ram With Page Mode Featuring Mirrorbit Technology,supplemental Datasheet
• Manufacturer: Meet Spansion Inc.

GENERAL DESCRIPTION
The 128 Mbit MirrorBit device is a 128 Mbit, 3.0 volt
single power supply flash memory devices organized
as 8,388,608 words. The device has a 16-bit wide data
bus. The device can be programmed either in the host
system or in standard EPROM programmers.
An access time of 105 or 110 ns is available. Each de-
vice has separate chip enable (CE#), write enable
(WE#) and output enable (OE#) controls.
Each device requires only a single 3.0 volt power
supply for both read and write functions. In addition to
a V
(WP#/ACC) input provides shorter programming times
through increased current. This feature is intended to
facilitate factory throughput during system production,
but may also be used in the field if desired.
The device is entirely command set compatible with
the JEDEC single-power-supply Flash standard.
Commands are written to the device using standard
microprocessor write timing. Write cycles also inter-
nally latch addresses and data needed for the pro-
gramming and erase operations.
The sector erase architecture allows memory sec-
tors to be erased and reprogrammed without affecting
the data contents of other sectors. The device is fully
erased when shipped from the factory.
Device programming and erasure are initiated through
command sequences. Once a program or erase oper-
ation has begun, the host system need only poll the
DQ7 (Data# Polling) or DQ6 (toggle) status bits to de-
termine whether the operation is complete. To facilitate
programming, an Unlock Bypass mode reduces com-
mand sequence overhead by requiring only two write
cycles to program data instead of four.
Hardware data protection measures include a low
V
RELATED DOCUMENTS
For a comprehensive information on MirrorBit prod-
ucts, including migration information, data sheets, ap-
plication notes, and software drivers, please see
www.amd.com
tion
mentation. The following is a partial list of documents
closely related to this product:
2
CC
CC
→
detector that automatically inhibits write opera-
MirrorBit
input, a high-voltage accelerated program
→
→
Flash Information
Flash Memory
→
→
Product Informa-
Technical Docu-
Am49LV128BM
tions during power transitions. The hardware sector
protection feature disables both program and erase
operations in any combination of sectors of memory.
This can be achieved in-system or via programming
equipment.
The Erase Suspend/Erase Resume feature allows
the host system to pause an erase operation in a
given sector group to read or program any other sector
group and then complete the erase operation. The
Program Suspend/Program Resume feature en-
ables the host system to pause a program operation in
a given sector group to read any other sector group
and then complete the program operation.
The hardware RESET# pin terminates any operation
in progress and resets the device, after which it is then
ready for a new operation. The RESET# pin may be
tied to the system reset circuitry. A system reset would
thus also reset the device, enabling the host system to
read boot-up firmware from the Flash memory device.
The device reduces power consumption in the
standby mode when it detects specific voltage levels
on CE# and RESET#, or when addresses have been
stable for a specified period of time.
The SecSi™ (Secured Silicon) Sector provides a
128-word area for code or data that can be perma-
nently protected. Once this sector is protected, no fur-
ther changes within the sector can occur.
The Write Protect (WP#/ACC) feature protects the
last sector by asserting a logic low on the WP# pin.
AMD MirrorBit flash technology combines years of
Flash memory manufacturing experience to produce
the highest levels of quality, reliability and cost effec-
tiveness. The device electrically erases all bits within a
sector simultaneously via hot-hole assisted erase. The
data is programmed using hot electron injection.
MirrorBit™ Flash Memory Write Buffer Programming
and Page Buffer Read
Implementing a Common Layout for AMD MirrorBit
and Intel StrataFlash Memory Devices
Migrating from Single-byte to Three-byte Device IDs
June 17, 2004