s71ns128jc0 Advanced Micro Devices, s71ns128jc0 Datasheet - Page 82

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s71ns128jc0

Manufacturer Part Number
s71ns128jc0
Description
Stacked Multi-chip Product Mcp 128 Megabit 8m X 16 Bit Cmos 1.8 Volt-only Simultaneous Read/write, Burst-mode Multi-plexed Flash Memory With 64megabit 4m X 16-bit Cellularram
Manufacturer
Advanced Micro Devices
Datasheet
80
DQ[15:0]
A/DQ[15:0]
A/DQ[15:0]
A[21:0]
WAIT
WAIT
ADV#
CLK
CLK
V IH
V IL
V IH
V IH
V OH
V OL
V OH
V OL
V IL
V IL
Figure 24.8 Latency Counter (Variable Initial Latency, No Refresh Collision)
Valid Address
Figure 24.7 Wait Configuration During Burst Operation
Table 24.3 Variable Latency Configuration Codes
Code 2
Code 3
A d v a n c e
D[0]
CellularRAM Type 2
(Default)
I n f o r m a t i o n
Output
D[1]
Valid
Legend:
D[2]
Output
Output
Valid
Valid
Don't care
D[3]
Output
Output
Valid
Valid
Legend:
S71NS-J-00_A0 March 17, 2005
Undefined
D[4]
Output
Output
Valid
Valid
Don't care
BCR[8] = 0
Data Valid in
Current Cycle
BCR[8] = 1
Data Valid in
Next Cycle
Output
Output
Valid
Valid

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