s71ns128jc0 Advanced Micro Devices, s71ns128jc0 Datasheet - Page 62

• Manufacturer Part Number: s71ns128jc0
• Description: Stacked Multi-chip Product Mcp 128 Megabit 8m X 16 Bit Cmos 1.8 Volt-only Simultaneous Read/write, Burst-mode Multi-plexed Flash Memory With 64megabit 4m X 16-bit Cellularram
• Manufacturer: Advanced Micro Devices

60
A max
AVD#
A/DQ
OE#
RDY
A/DQ15
CE#
CLK
A/DQ0
AVD#
–
RDY
OE#
CLK
A16
AVD# low with clock
–
present enables
Hi-Z
burst read mode
Figure 17.14 Example of Extended Valid Address Reducing Wait State Usage
t
Figure 17.13 Initial Access at 3Eh with Address Boundary Latency
Address
Address
AVDSM
Addresses
A d v a n c e
during initial access (here, programmable wait state
S71NS128JC0 Based MCP
t
device is programmable from 2 to 7 total cycles
OE
function is set to 04h; 6 cycles total)
t
IACC
High-Z
I n f o r m a t i o n
D0
wait states if
D0
2 additional
at boundary
address is
S71NS-J-00_A0 March 17, 2005
D1
D1
D2
D2