m36l0t8060b1 STMicroelectronics, m36l0t8060b1 Datasheet
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m36l0t8060b1
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m36l0t8060b1 Summary of contents
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... V for fast program PPF Electronic signature – Manufacturer code: 20h – Top device code M36L0T8060T1: 880Dh – Bottom device code M36L0T8060B1: 880Eh Package – ECOPACK® Flash memory Synchronous/asynchronous read – Synchronous burst read mode: 52 MHz – Asynchronous page read mode – ...
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... supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 CCP supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 program supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 M36L0T8060T1, M36L0T8060B1 ...
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... M36L0T8060T1, M36L0T8060B1 7 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Contents 3/22 ...
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... Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 2. Main operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 4. Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 5. Device capacitance Table 6. Stacked TFBGA88 8 × × 10 active ball array, 0.8 mm pitch, package data . . . 19 Table 7. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 8. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4/22 M36L0T8060T1, M36L0T8060B1 ...
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... M36L0T8060T1, M36L0T8060B1 List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. TFBGA connections (top view through package Figure 3. Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 4. AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 5. AC measurement load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 6. TFBGA88 8 × 10 mm, 8 × 10 ball array - 0.8 mm pitch, bottom view package outline List of figures ...
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... Description 1 Description The M36L0T8060T1 and M36L0T8060B1 combine two memory devices in a multichip package: a 256-Mbit, multiple bank Flash memory, the M30L0T8000T2 or M30L0T8000B2 a 64-Mbit PSRAM, the M69KW096B The M36L0T8060TB1 datasheet should be read in conjunction with the M30L0T8000x2 and M69KW096B datasheets, both available from any local STMicroelectronics distributor. ...
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... M36L0T8060T1, M36L0T8060B1 Table 1. Signal names Signal name (1) A0-A23 DQ0-DQ15 V DDF V DDQF V PPF CCP NC DU Flash memory signals WAIT F PSRAM signals A22-A23 are only address inputs for the Flash memory component. ...
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... DQ8 DQ2 DQ10 DQ5 DQ0 DQ1 DQ3 DQ12 G F DQ9 DQ11 DQ4 CCP DDQ V DDF M36L0T8060T1, M36L0T8060B1 A21 A11 K F A22 A12 A13 A20 A10 A15 A8 A14 A16 DQ13 WAIT F NC ...
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... M36L0T8060T1, M36L0T8060B1 2 Signal descriptions See Figure 1: Logic diagram connected to this device. 2.1 Address inputs (A0-A23) Addresses A0-A21 are common inputs for the Flash memory and PSRAM components. The other lines (A23-A22) are only inputs for the Flash memory component. The address inputs select the cells in the memory array to access during bus read operations ...
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... F . Clock is ignored during asynchronous can be configured to be active during the wait cycle activates the memory state machine, address and M36L0T8060T1, M36L0T8060B1 , lock-down is disabled and IH , Output the same time the ...
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... M36L0T8060T1, M36L0T8060B1 2.12 PSRAM Chip Enable (E2 The Chip Enable, E2 standby) when it is driven Low. Deep power-down mode is the lowest power mode not allowed to set E 2.13 PSRAM Output Enable (G The Output Enable, G cycles to be achieved with the common I/O data bus. 2.14 PSRAM Write Enable (W The Write Enable ...
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... PPF it acts as a power supply pin. In this condition V PPH decoupled with a 0.1 µF ceramic capacitor close to the pin PPF program and erase currents. PPF M36L0T8060T1, M36L0T8060B1 ) V is seen as a control input. In this PPF DDF circuit. The PCB track widths should be must be PPF ...
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... M36L0T8060T1, M36L0T8060B1 3 Functional description The PSRAM and Flash memory components have separate power supplies but share the same grounds. They are distinguished by three Chip Enable inputs: E memory and E1 P Recommended operating conditions do not allow more than one device to be active at a time. The most common example is simultaneous read operations on the Flash memory and PSRAM components, which would result in a data bus contention ...
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... but must be valid before PSRAM read or write operation. IH controlled write timing), or cycle time of the previous operation cycle is satisfied; P M36L0T8060T1, M36L0T8060B1 DQ0-DQ7 DQ8-DQ15 Flash data out Flash data in Flash data out or Hi- Data ...
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... M36L0T8060T1, M36L0T8060B1 4 Maximum ratings Stressing the device above the ratings listed in the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
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... AC measurement I/O waveform 1. V means V DDQ DDQF 16/22 conditions. Designers should check that the Flash memory Min 1.7 – 2.7 8.5 –0 DDQ CCP M36L0T8060T1, M36L0T8060B1 PSRAM Max Min Max 1.95 – – – 2.7 3.1 3.1 – – 9.5 – – V +0.4 – – DDQF 30 50 16.7 16.7 5 ...
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... M36L0T8060T1, M36L0T8060B1 Figure 5. AC measurement load circuit Table 5. Device capacitance Symbol C Input capacitance IN C Output capacitance OUT 1. Sampled only, not 100% tested. Please refer to the M30L0T8000x0 and M69KW096B datasheets for further DC and AC characteristic values and illustrations DDF DDQFF DEVICE UNDER TEST 0.1 µ ...
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... ECOPACK trademark and specifications are available at www.st.com. Figure 6. TFBGA88 8 × 10 mm, 8 × 10 ball array - 0.8 mm pitch, bottom view package outline Drawing is not to scale. 18/ BALL "A1" FE FE1 M36L0T8060T1, M36L0T8060B1 e b ddd A2 A1 BGA-Z42 ...
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... M36L0T8060T1, M36L0T8060B1 Table 6. Stacked TFBGA88 8 × × 10 active ball array, 0.8 mm pitch, package data Symbol Typ 0.850 b 0.350 D 8.000 D1 5.600 ddd E 10.000 E1 7.200 E2 8.800 e 0.800 FD 1.200 FE 1.400 FE1 0.600 SD 0.400 SE 0.400 Millimeters Min Max 1.200 0.200 0.0335 0.300 0.400 0.0138 7 ...
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... Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact the STMicroelectronics sales office nearest to you. 20/22 M36 ZAQ 2 3.1 V DDQF CCP M36L0T8060T1, M36L0T8060B1 ...
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... M36L0T8060T1, M36L0T8060B1 8 Revision history Table 8. Document revision history Date Revision 15-Dec-2006 25-Feb-2008 0.1 Initial release 1 Datasheet promoted to full maturity. Revision history Changes 21/22 ...
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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 22/22 Please Read Carefully: © 2008 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com M36L0T8060T1, M36L0T8060B1 ...