xe1205 Semtech Corporation, xe1205 Datasheet - Page 16

• Manufacturer Part Number: xe1205
• Description: Low-power, High Link Budget Integrated Uhf Transceiver
• Manufacturer: Semtech Corporation

The FIFO filling process is shown in detail in Figure 9. As the first byte is written into the FIFO the signal /fifoempty goes
high indicating that at least one byte is present. The microcontroller can then read the contents of the FIFO via the SPI
interface. Once all data have been read from the FIFO then /fifoempty goes low. Once the last bit of the sixteenth byte
has been written into the FIFO then the signal Fifofull is asserted; data should be read before the next byte is received.
This is illustrated in Figure 10.
The /fifoempty signal can be used as an interrupt signal for a microcontroller by mapping to pin IRQ_0 if
IRQParam_RX_irq_0 is set to 10 (please refer to section 5.2.2). Alternatively, the WRITE_BYTE signal may also be
used as an interrupt if IRQParam_RX_irq_0 is set to 01 .
5.2.5.1
Demodulation in buffered mode occurs in the same way as in continuous mode (section 5.2.3.1). Received data is
directly read from the FIFO and the DATA pin is not used.
5.2.5.2
In buffered mode the bit synchronizer is automatically enabled (DCLK is not externally available).
5.2.5.3
In buffered mode the pattern recognition block is automatically enabled. The PATTERN signal may be mapped to pin
IRQ_0. Please refer to section 5.2.2 for further details.
5.2.5.4
In buffered mode the Received Signal Strength Indication operates the same way as in continuous mode. In buffered
mode, however, RSSI_irq may be mapped to IRQ_1 (please refer to section 5.2.2) instead of to IRQ_0 in continuous
mode.
5.2.5.5
In buffered mode the Frequency Error Indication operates the same way as in continuous mode. Please refer to section
5.2.3.5 for more details.
© Semtech 2007
IRQParam_Fifooverrun
Demodulator in buffered mode
Bit synchronizer in buffered mode
Pattern recognition block in buffered mode
RSSI in buffered mode
Frequency Error Indicator in buffered mode
DCLK
DATA
PATTERN
Write_byte
/Fifoempty
Fifofull
Byte 14
Figure 10: Completion of FIFO filling
Byte 15
FEI
16
Byte 16
Completion of FIFO filling
Byte 17
XE1205
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