am79c30a Advanced Micro Devices, am79c30a Datasheet - Page 19

• Manufacturer Part Number: am79c30a
• Description: Digital Subscriber Controller ?dsc ?circuit
• Manufacturer: Advanced Micro Devices

LIU Mode Register (LMR1), Read/Write
Address = Indirect A3H
LMR1 is defined in Table 12.
Notes:
The F and F
with INFO 3.
LMR1 bit 4 is used to transfer the signals PH-AR and Expiry of Timer from the microprocessor to the LIU (see CCITT I.430 state
diagram—activation request). PH-AR is defined as bit 4 being a logical 1 and Expiry of Timer is defined as the transition of bit 4
from a logical 1 to a logical 0. This bit must not be set until the LIU, as reflected in the LSR, is in state F3, F6, or F7 and the
receiver has been enabled for a minimum of 250 µs.
LMR1 bit 6 is primarily used to disable the receiver when the terminal does not require access to the S Interface signals. This bit
is cleared by reset and must be written to logical 1 in order to receive activation from the S Interface, or to request activation.
LIU Mode Register 2 (LMR2), Read/Write
Address = Indirect A4H
LMR2 is used to select the operations found in Table 13.
Bit
0
1
2
3
4
5
6
7
Bit
0
1
2
3
4
5
6
7
Logical 1
Enable B1 transmit
Enable B2 transmit
Disable F transmit
Disable F
Activation request
Go from F8 to F3
Enable receiver/transmitter
Reserved; must be set to logical 0
A
bits in LMR1 (bits 2 and 3) should be enabled during the activation procedure so the Am79C30A/32A can respond
Logical 1
D-channel loopback at Am79C30A/32A enable
D-channel loopback at LIU enable
D-channel back-off disable
F3 change of state interrupt enable
F8 change of state interrupt enable
HSW interrupt enable
F7 change of state interrupt enable
Reserved; must be set to logical 0
A
transmit
Table 12. LIU Mode Register 1
Table 13. LIU Mode Register 2
Am79C30A/32A Data Sheet
Logical 0 (default value)
Disable B1 transmit
Disable B2 transmit
Enable F transmit
Enable F
No activation request
No transition
Disable receiver/transmitter
Reserved; must be set to logical 0
D-channel loopback at LIU disable
D-channel back-off enable
F3 change of state interrupt disable
F8 change of state interrupt disable
F7 change of state interrupt disable
Reserved; must be set to logical 0
Logical 0 (Default Value)
D-channel loopback at Am79C30A/32A disable
HSW interrupt disable
A
transmit
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