zl50021 Zarlink Semiconductor, zl50021 Datasheet - Page 79

• Manufacturer Part Number: zl50021
• Description: Enhanced 4 K Digital Switch With Stratum 3 Dpll
• Manufacturer: Zarlink Semiconductor

Note 1:
Note 2:
15 - 0
External Read/Write Address: 004E
Reset Value: A346
MNU
1 - 0
Bit
External Read Only Address: 004C
Bit
15
15
15
0
The default value represents near upper limit for all reference frequencies, which is +9.913 ppm (Stratum 3 compliant
value), regardless of the reference frequency.
The name ’upper’ is based on frequency.
MNU
14
14
14
0
MNU15 - 0
DPM1 - 0
Table 41 - Reference Change Status Register (RCSR) Bits - Read Only (continued)
Name
Name
Table 42 - Multi-period Near Upper Limit Register - Lower 16 Bits (MPNULRL)
MNU
H
13
13
13
0
(Note 1)
MNU
DPLL Timing Mode Status Bits: These bits indicate the DPLL’s timing mode status.
12
12
12
0
Multiple-Period Near Upper Limit Bits: Total binary value of these bits and the
MPNULRU register bits defines the near upper limit for the multiple period count of any
reference input, minus 1. The unit of the binary value is measured in 100 MHz clock
periods.
H
MNU
H
11
11
11
0
MNU
10
10
10
0
DPM1
MNU
0
0
1
1
9
0
9
9
Zarlink Semiconductor Inc.
ZL50021
SLM
MNU
DPM0
8
8
8
0
1
0
1
79
MNU
LST
7
7
7
DPLL Timing Mode State
Description
Description
RFR2
MNU
6
6
6
Holdover
Freerun
Normal
MTIE
RFR1
MNU
5
5
5
RFR0
MNU
4
4
4
RES1
MNU
3
3
3
RES0
MNU
2
2
2
DPM1
Data Sheet
MNU
1
1
1
DPM0
MNU
0
0
0