zl50021 Zarlink Semiconductor, zl50021 Datasheet - Page 106

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zl50021

Manufacturer Part Number
zl50021
Description
Enhanced 4 K Digital Switch With Stratum 3 Dpll
Manufacturer
Zarlink Semiconductor
Datasheet

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25.1.2
When an external clock oscillator is used, numerous parameters must be considered. They include absolute
frequency, frequency change over temperature, output rise and fall times, output levels and duty cycle.
The output clock should be connected directly (not AC coupled) to the OSCi input of the device, and the OSCo
output should be left open as shown in Figure 24 on page 106. XC is a buffered version of the 20 MHz input clock
connected to the internal circuitry.
For applications requiring ±32 ppm clock accuracy, the following requirements should be met:
For applications requiring Stratum 3 compliance (±4.6 ppm clock accuracy), the following temperature
compensated clock oscillator module may be used.
Frequency
Tolerance
Rise and Fall Time
Duty Cycle
Frequency
Tolerance
Rise and Fall Time
Duty Cycle
External Clock Oscillator
XC
4K DX
Figure 24 - Clock Oscillator Circuit
Zarlink Semiconductor Inc.
20.000 MHz
±32 ppm
10 ns
40% to 60%
20.000 MHz
±4.6 ppm
10 ns
40% to 60%
ZL50021
OSCo
OSCi
No Connection
106
20 MHz OUT
+3.3 V
+3.3 V
GND
0.1 µF
Data Sheet

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