zl50019gag2 Zarlink Semiconductor, zl50019gag2 Datasheet - Page 2

• Manufacturer Part Number: zl50019gag2
• Description: Enhanced 2 K Digital Switch With Stratum 4e Dpll
• Manufacturer: Zarlink Semiconductor

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Applications
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Per-channel ITU-T G.711 PCM A-Law/µ-Law Translation
Four frame pulse and six reference clock outputs
Three programmable delayed frame pulse outputs
Input clock: 4.096 MHz, 8.192 MHz, 16.384 MHz
Input frame pulses: 61 ns, 122 ns, 244 ns
Per-channel constant or variable throughput delay for frame integrity and low latency applications
Per Stream (32) Bit Error Rate Test circuits complying to ITU-O.151
Per-channel high impedance output control
Per-channel message mode
Control interface compatible with Intel and Motorola 16-bit non-multiplexed buses
Connection memory block programming
Supports ST-BUS and GCI-Bus standards for input and output timing
IEEE-1149.1 (JTAG) test port
3.3 V I/O with 5 V tolerant inputs; 1.8 V core voltage
PBX and IP-PBX
Small and medium digital switching platforms
Remote access servers and concentrators
Wireless base stations and controllers
Multi service access platforms
Digital Loop Carriers
Computer Telephony Integration
Zarlink Semiconductor Inc.
ZL50019
2
Data Sheet