zl50015qcg1 Zarlink Semiconductor, zl50015qcg1 Datasheet - Page 26

• Manufacturer Part Number: zl50015qcg1
• Description: Enhanced 1 K Channel Tdm Switch With Rate Conversion
• Manufacturer: Zarlink Semiconductor

7.4
In addition to the output bit advancement, the device has a fractional output bit advancement feature that offers
better resolution. The fractional output bit advancement is useful in compensating for varying parasitic load on the
serial data output pins.
By default all of the streams have zero fractional bit advancement such that bit 7 is the first bit that appears after the
output frame boundary. The fractional output bit advancement is enabled by STO[n]FA 1 - 0 (bits 8 - 7) in the
Stream Output Control Register 0 - 15 (SOCR0 - 15). For all streams running at any data rate except 16.384 Mbps
the fractional bit advancement can vary from 0, 1/4, 1/2 to 3/4 bits. For streams operating at 16.384 Mbps, the
fractional bit advancement can be set to either 0 or 1/2 bit.
STio[n]
STo[n]FA1-0
(2,
STo[n]FA1-0 = 01
(16 Mbps)
STio[n]
STo[n]FA1-0 = 11
(2, 4 or 8 Mbps)
FPi
STio[n]
STo[n]FA1-0 = 00
(Default 2, 4, 8 or
16Mb/s)
STio[n]
STo[n]FA1-0 = 01
(2, 4 or 8 Mbps)
FPi
STio[n]
Bit Adv = 0
(Default)
STio[n]
Bit Adv = 1
Fractional Output Bit Advancement Programming
4
Note: Last Channel = 31, 63, 127 and 255 for 2.048, 4.096, 8.192 and 16.384 Mbps modes respectively.
or
Note: Last Channel = 31, 63, 127 and 255 for 2.048, 4.096, 8.192 and 16.384 Mbps modes respectively.
8 Mbps)
=
Figure 15 - Output Fractional Bit Advancement Timing Diagram (ST-BUS)
10
4 3
Last Channel
3
Last Channel
Figure 14 - Output Bit Advancement Timing Diagram (ST-BUS)
2 1 0
2 1 0
2
1
Last Channel
1
7
Last Channel
Last Channel
Last Channel
7
1
6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3
6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2
1
Bit Advancement = 1
0
Channel 0
Channel 0
Zarlink Semiconductor Inc.
0
ZL50016
0
0
26
7
7
Channel 0
7
Fractional Bit Advancement = 1/4 Bit
Fractional Bit Advancement = 1/2 Bit
Channel 0
Fractional Bit Advancement = 3/4 Bit
7
Channel 0
Channel 0
6
Channel 1
Channel 1
6
6
6
5
5
5
5
4
Channel 2
Channel 2
Data Sheet
4
2 1
4