mt9092apr1 Zarlink Semiconductor, mt9092apr1 Datasheet - Page 20

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mt9092apr1

Manufacturer Part Number
mt9092apr1
Description
Fully Featured Digital Telephone Circuit With Embedded Hdlc Transceiver And Dsp For Tone Generations And Hands Free Operation
Manufacturer
Zarlink Semiconductor
Datasheet

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Ch
Transmit PCM on DSTo
When high, PCM from the Filter/CODEC and DSP is transmitted on DSTo in the selected ST-BUS channel. When
low, DSTo is forced to logic 0 for the corresponding timeslot. If both Ch
channel 2.
Receive PCM from DSTi
When high, PCM from DSTi is routed to the DSP and Filter/CODEC in the associated channel. If both Ch
Ch
New Call Tone
The New Call Tone Generator produces a frequency shifted square-wave used to toggle the speaker driver outputs.
This is intended for use where a ringing signal is required concurrently with an already established voice
conversation in the handset.
Programming of the DSP for New Call generator is exactly as is done for the tone ringer micro-program except that
the OPT bit (DSP Control Register, address 1Eh) is set high. In this mode the DSP does not produce a frequency
shifted squarewave output to the filter CODEC section. Instead the DSP uses the contents of the tone coefficient
registers, along with the tone warble rate register, to produce a gated squarewave control signal output which
toggles between the programmed frequencies. This control signal is routed to the New Call Tone block when the
NCT EN control bit is set (General Control Register, address 0Fh). NCT EN also enables a separate gain control
block, for controlling the loudness of the generated ringing signal. With the gain control block set to 0 dB the output
is at maximum or 6 volts p-p. Attenuation of the applied signal, in three steps of 8 dB, provide the four settings for
New Call tone (0, -8, -16, -24 dB). The NCT gain bits (NCTG
Register 2 (address 0Bh).
F0i
DSTi,
DSTo
3
2
EN are enabled the default is to channel 2.
EN and Ch
enable the PCM channels from/to the HPhone-II as required.
Channels 2 and 3 are the B1 and B2 channels, respectively. These bits (Ch
CHANNEL 0
D-channel
LSB first
Channel
3
for D-
EN - B1-Channel and B2-Channel
CHANNEL 1
C-channel
MSB first for C, B1 - & B2-
Figure 7 - ST-BUS Channel Assignment
CHANNEL 2
B1-channel
Channels
Zarlink Semiconductor Inc.
MT9092
CHANNEL 3
B2-channel
125 µs
20
0
CHANNELS 4 - 31
-NCTG
Not Used
2
EN and Ch
1
) reside in the FCODEC Gain Control
2
3
EN and Ch
EN are enabled, default is to
3
EN) are used to
Data Sheet
2
EN and

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