mt90528ag2 Zarlink Semiconductor, mt90528ag2 Datasheet - Page 71

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mt90528ag2

Manufacturer Part Number
mt90528ag2
Description
28-port Primary Rate Circuit Emulation Aal1 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
Figure 28 - Reassembly Control Structure - SDT Format
Note 1: Fields which appear in dark grey are reserved fields which
must be cleared by software upon initialization.
Note 2: Fields which appear in grey are those which are updated
by hardware.
Note 3: SDT Reassembly Control Structures must always start on
16-word (32-byte) boundaries.
+11A
Byte
+114
+116
+118
Add
+0E
+0A
+0C
+1A
+1C
+1E
+00
+02
+04
+06
+08
+10
+12
+14
+16
+18
+20
15
PV_SN
R
V_RTS
C
D
V
<2:0>
<3:1>
Pointer Parity Errors
CAS
CAS124
CAS125
CAS126
CAS127
14
Misinserted Cells
CAS0
CAS1
CAS2
AAL1 Sequence
Buffer Overflows
A S
P
Res
13
P
First Entry
i
Maximum Lead
Res
Errors
12
M
Zarlink Semiconductor Inc.
<3:1>
I
RTS
11
BS
Current
Frame
Minimum Structure
Size - 30 bytes (1
channel)
Maximum Structure
Size - 284 bytes (128
channels)
10
Reassembled Cells
MT90528
SDT RX_SAR Write Pointer
C
c
Reassembly Circular Buffer
Reassembly Circular Buffer
Reassembly Circular Buffer
Reassembly Circular Buffer
Reassembly Circular Buffer
Reassembly Circular Buffer
Reassembly Circular Buffer
P
9
o
Res
Last
Seq
Location in Structure
R
8
o
Structure Length
Base Address
Base Address
Base Address
Base Address
Base Address
Base Address
Base Address
71
R
o
7
AAL1 Header Errors
6
R
Pointer Reframes
o
Buffer Underruns
Good
Current Entry
Last
R
R
5
o
T
Lost Cells
Last Entry
Number of
Channels
R
4
o
VC TDM
Fast State
R
3
o
Port
R
o
2
R
o
1
R
0
o
Word
Add
+0A
+0B
+0C
+0D
+0E
+0F
+8A
+8B
+8C
+8D
+00
+01
+02
+03
+04
+05
+06
+07
+08
+09
+10
Data Sheet

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